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BETA
Zetterling, Carl-MikaelORCID iD iconorcid.org/0000-0001-8108-2631
Alternative names
Publications (10 of 203) Show all publications
Kargarrazi, S., Elahipanah, H., Saggini, S., Senesky, D. & Zetterling, C.-M. (2019). 500 degrees C SiC PWM Integrated Circuit. IEEE transactions on power electronics, 34(3), 1997-2001
Open this publication in new window or tab >>500 degrees C SiC PWM Integrated Circuit
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2019 (English)In: IEEE transactions on power electronics, ISSN 0885-8993, E-ISSN 1941-0107, Vol. 34, no 3, p. 1997-2001Article in journal (Refereed) Published
Abstract [en]

This letter reports on a high-temperature pulsewidth modulation (PWM) integrated circuit microfabricated in 4H-SiC bipolar process technology that features an on-chip integrated ramp generator. The circuit has been characterized and shown to be operational in a wide temperature range from 25 to 500 degrees C. The operating frequency of the PWM varies in the range of 160 to 210 kHz and the duty cycle varies less than 17% over the entire temperature range. The proposed PWM is suggested to efficiently and reliably control power converters in extreme environments.

Place, publisher, year, edition, pages
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 2019
Keywords
Bipolar junction transistor (BJT), high-temperature integrated circuit (IC), pulsewidth modulator (PWM), silicon carbide
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-244489 (URN)10.1109/TPEL.2018.2859430 (DOI)000458179200003 ()2-s2.0-85050612857 (Scopus ID)
Note

QC 20190321

Available from: 2019-03-21 Created: 2019-03-21 Last updated: 2019-03-21Bibliographically approved
Shakir, M. (2019). 555-Timer IC Operational at 500 °C. Bipolar SiC 555-timer IC, High Temperature ICs, TTL Comparator, SiC Integrated Circuits
Open this publication in new window or tab >>555-Timer IC Operational at 500 °C
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2019 (English)In: Bipolar SiC 555-timer IC, High Temperature ICs, TTL Comparator, SiC Integrated CircuitsArticle in journal (Other academic) [Artistic work] Submitted
Abstract [en]

This paper reports an industry standard monolithic 555-timer circuit designed and fabricated in the in-house silicon carbide (SiC) low-voltage bipolar technology. The paper demonstrates the 555-timer ICs characterization in both astable and monostable modes of operation, with a supply voltage of 15 V over the wide temperature range of 25 to 500°C. Nonmonotonictemperature dependence was observed for the 555-timer IC frequency, rise-time, fall-time, and power dissipation.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:kth:diva-251765 (URN)
Funder
Knut and Alice Wallenberg Foundation
Note

QC 20190523

Available from: 2019-05-21 Created: 2019-05-21 Last updated: 2019-05-23Bibliographically approved
Hou, S., Hellström, P.-E., Zetterling, C.-M. & Östling, M. (2019). A 4H-SiC BJT as a Switch for On-Chip Integrated UV Photodiode. IEEE Electron Device Letters, 40(1), 51-54
Open this publication in new window or tab >>A 4H-SiC BJT as a Switch for On-Chip Integrated UV Photodiode
2019 (English)In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 40, no 1, p. 51-54Article in journal (Refereed) Published
Abstract [en]

This letter presents the design, fabrication, and characterization of a 4H-SiC n-p-n bipolar junction transistor as a switch controlling an on-chip integrated p-i-n photodiode. The transistor and photodiode share the same epitaxial layers and topside contacts for each terminal. By connecting the collector of the transistor and the anode of the photodiode, the photo current from the photodiode is switched off at low base voltage (cutoff region of the transistor) and switched on at high base voltage (saturation region of the transistor). The transfer voltage of the circuit decreases as the ambient temperature increases (2 mV/degrees C). Both the on-state and off-state current of the circuit have a positive temperature coefficient and the on/off ratio is >80 at temperature ranged from 25 degrees C to 400 degrees C. It is proposed that the on/off ratio can be increased by similar to 1000 times by adding a light blocking layer on the transistor to reduce light induced off-state current in the circuit.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2019
Keywords
4H-SiC, BJT, UV, photodiode, high temperature, switch
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-242990 (URN)10.1109/LED.2018.2883749 (DOI)000456172600013 ()2-s2.0-85057777289 (Scopus ID)
Funder
Knut and Alice Wallenberg Foundation
Note

QC 20190204

Available from: 2019-02-04 Created: 2019-02-04 Last updated: 2019-04-10Bibliographically approved
Shakir, M., Hou, S. & Zetterling, C.-M. (2019). A Monolithic 500 °C D-flip flop Realized in Bipolar 4H-SiC TTL technology. In: : . Paper presented at Materials Science Forum, Proceedings of European Conference on Silicon Carbide and Related Materials 2018.
Open this publication in new window or tab >>A Monolithic 500 °C D-flip flop Realized in Bipolar 4H-SiC TTL technology
2019 (English)Conference paper, Poster (with or without abstract) (Other academic) [Artistic work]
Keywords
TTL-based DFF, Bipolar SiC integrated circuits, High-temperature integrated circuits (ICs), Transistor-transistor logic (TTL), Bipolar junction transistor (BJT), Digital gates
National Category
Engineering and Technology
Identifiers
urn:nbn:se:kth:diva-251764 (URN)
Conference
Materials Science Forum, Proceedings of European Conference on Silicon Carbide and Related Materials 2018
Note

QC 20190523

Available from: 2019-05-21 Created: 2019-05-21 Last updated: 2019-05-23Bibliographically approved
Ekström, M., Malm, B. G. & Zetterling, C.-M. (2019). High-Temperature Recessed Channel SiC CMOS Inverters and Ring Oscillators. IEEE Electron Device Letters, 40(5), 670-673
Open this publication in new window or tab >>High-Temperature Recessed Channel SiC CMOS Inverters and Ring Oscillators
2019 (English)In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 40, no 5, p. 670-673Article in journal (Refereed) Published
Abstract [en]

Digital electronics in SiC find use in high-temperature applications. The objective of this study was to fabricate SiC CMOS without using ion implantation. In this letter, we present a recessed channel CMOS process. Selective doping is achieved by etching epitaxial layers into mesas. A deposited SiO2-film, post-annealed at lowtemperature and re-oxidized in pyrogenic steam, is used as the gate oxide to produce a conformal gate oxide over the non-planar topography. PMOS, NMOS, inverters, and ring oscillators are characterized at 200 °C. The PMOS requires reduced threshold voltage in order to enable long term reliability. This result demonstrates that it is possible to fabricate SiC CMOS without ion implantation and by low-temperature processing.

Keywords
Inverter, recessed channel, ring oscillator (RO), silicon carbide (4H-SiC), static CMOS
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-250275 (URN)10.1109/LED.2019.2903184 (DOI)2-s2.0-85064992240 (Scopus ID)
Funder
Knut and Alice Wallenberg Foundation, Working on VenusSwedish Foundation for Strategic Research , CMP Lab
Note

QC 20190428

Available from: 2019-04-27 Created: 2019-04-27 Last updated: 2019-05-16Bibliographically approved
Ekström, M., Ferrario, A. & Zetterling, C.-M. (2019). Investigation of a Self-Aligned Cobalt Silicide Process for Ohmic Contacts to Silicon Carbide. Journal of Electronic Materials, 48(4), 2509-2516
Open this publication in new window or tab >>Investigation of a Self-Aligned Cobalt Silicide Process for Ohmic Contacts to Silicon Carbide
2019 (English)In: Journal of Electronic Materials, ISSN 0361-5235, E-ISSN 1543-186X, Vol. 48, no 4, p. 2509-2516Article in journal (Refereed) Published
Abstract [en]

Previous studies showed that cobalt silicide can form ohmic contacts to p-type 6H-SiC by directly reacting cobalt with 6H-SiC. Similar results can be achieved on 4H-SiC, given the similarities between the different silicon carbide polytypes. However, previous studies using multilayer deposition of silicon/cobalt on 4H-SiC gave ohmic contacts to n-type. In this study, we investigated the cobalt silicide/4H-SiC system to answer two research questions. Can cobalt contacts be self-aligned to contact holes to 4H-SiC? Are the self-aligned contacts ohmic to n-type, p-type, both or neither? Using x-ray diffraction, it was found that a mixture of silicides (Co2Si and CoSi) was reliably formed at 800°C using rapid thermal processing. The cobalt silicide mixture becomes ohmic to epitaxially grown n-type (1×1019cm-3) if annealed at 1000°C, while it shows rectifying properties to epitaxially grown p-type (1×1019cm-3) for all tested anneal temperatures in the range 800–1000°C. The specific contact resistivity (ρC) to n-type was 4.3×10-4 Ω cm2. This work opens the possibility to investigate other self-aligned contacts to silicon carbide.

Place, publisher, year, edition, pages
Springer, 2019
Keywords
Cobalt (Co), rapid thermal processing (RTP), self-aligned silicide, silicon carbide (4H-SiC), transfer length method (TLM)
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-250274 (URN)10.1007/s11664-019-07020-0 (DOI)000460453100095 ()2-s2.0-85061514454 (Scopus ID)
Funder
Knut and Alice Wallenberg Foundation, Working on Venus
Note

QC 20190428

Available from: 2019-04-27 Created: 2019-04-27 Last updated: 2019-04-29Bibliographically approved
Hou, S., Shakir, M., Hellström, P.-E., Zetterling, C.-M. & Östling, M. (2019). Process Control and Optimization of 4H-SiC Semiconductor Devices and Circuits. In: Proceedings of the 3rd Electron Devices Technology and Manufacturing, (EDTM) Conference 2019: . Paper presented at The 3rd Electron Devices Technology and Manufacturing (EDTM) Conference. IEEE
Open this publication in new window or tab >>Process Control and Optimization of 4H-SiC Semiconductor Devices and Circuits
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2019 (English)In: Proceedings of the 3rd Electron Devices Technology and Manufacturing, (EDTM) Conference 2019, IEEE, 2019Conference paper, Published paper (Refereed)
Place, publisher, year, edition, pages
IEEE, 2019
National Category
Engineering and Technology
Identifiers
urn:nbn:se:kth:diva-248421 (URN)
Conference
The 3rd Electron Devices Technology and Manufacturing (EDTM) Conference
Note

QC 20190411

Available from: 2019-04-08 Created: 2019-04-08 Last updated: 2019-04-11Bibliographically approved
Shakir, M., Hou, S., Hedayati, R., Malm, B. G., Östling, M. & Zetterling, C.-M. (2019). Towards Silicon Carbide VLSI Circuits for Extreme Environment Applications. Electronics, 8(5)
Open this publication in new window or tab >>Towards Silicon Carbide VLSI Circuits for Extreme Environment Applications
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2019 (English)In: Electronics, ISSN 2079-9292,, Vol. 8, no 5Article in journal (Other academic) Published
Abstract [en]

A Process Design Kit (PDK) has been developed to realize complex integrated circuits in Silicon Carbide (SiC) bipolar low-power technology. The PDK development process included basic device modeling, and design of gate library and parameterized cells. A transistor–transistor logic (TTL)-based PDK gate library design will also be discussed with delay, power, noise margin, and fan-out as main design criterion to tolerate the threshold voltage shift, beta (β) and collector current (IC) variation of SiC devices as temperature increases. The PDK-based complex digital ICsdesign flow based on layout, physical verification, and in-house fabrication process will also be demonstrated. Both combinational and sequential circuits have been designed, such as a 720-device ALU and a 520-device 4 bit counter. All the integrated circuits and devices are fully characterized up to 500 °C. The inverter and a D-type flip-flop (DFF) are characterized as benchmark standard cells. The proposed work is a key step towards SiC-based very large-scale integrated (VLSI) circuits implementation for high-temperature applications.

Keywords
Process Design Kit (PDK); bipolar logic gates; high temperature digital integrated circuits (ICs); transistor–transistor logic (TTL); SiC bipolar transistor; SiC VLSI Circuits
National Category
Engineering and Technology
Identifiers
urn:nbn:se:kth:diva-248424 (URN)10.3390/electronics8050496 (DOI)
Funder
Knut and Alice Wallenberg Foundation, Working on Venus
Note

QC 20190410

Available from: 2019-04-08 Created: 2019-04-08 Last updated: 2019-05-23Bibliographically approved
Kajihara, J., Kuroki, S.-I. -., Ishikawa, S., Maeda, T., Sezaki, H., Makino, T., . . . Zetterling, C.-M. (2018). 4H-SiC pMOSFETs with al-doped S/D and NbNi silicide ohmic contacts. In: International Conference on Silicon Carbide and Related Materials, ICSCRM 2017: . Paper presented at 17 September 2017 through 22 September 2017 (pp. 423-427). Trans Tech Publications
Open this publication in new window or tab >>4H-SiC pMOSFETs with al-doped S/D and NbNi silicide ohmic contacts
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2018 (English)In: International Conference on Silicon Carbide and Related Materials, ICSCRM 2017, Trans Tech Publications, 2018, p. 423-427Conference paper, Published paper (Refereed)
Abstract [en]

4H-SiC pMOSFETs with Al-doped S/D and NbNi silicide ohmic contacts were demonstrated and were characterized at up to a temperature of 200°C. For the pMOSFETs, silicides on p-type 4H-SiC with Nb/Ni stack, Nb-Ni Alloy, Ni and Nb/Ti were investigated, and the Nb/Ni stack silicide with the contact resistance of 5.04×10-3 Ωcm2 were applied for the pMOSFETs.

Place, publisher, year, edition, pages
Trans Tech Publications, 2018
Keywords
4H-SiC, Harsh environment electronics, Nickel, Niobium, Ohmic contact, pMOSFET, Binary alloys, Electric contactors, MOSFET devices, Nickel alloys, Niobium alloys, Ohmic contacts, Silicides, Titanium alloys, Al doped, Harsh environment, Ni alloys, p-MOSFETs, P-type 4H-SiC, Silicon carbide
National Category
Condensed Matter Physics
Identifiers
urn:nbn:se:kth:diva-236375 (URN)10.4028/www.scientific.net/MSF.924.423 (DOI)2-s2.0-85049023373 (Scopus ID)9783035711455 (ISBN)
Conference
17 September 2017 through 22 September 2017
Note

QC 20181105

Available from: 2018-11-05 Created: 2018-11-05 Last updated: 2018-11-05Bibliographically approved
Kargarrazi, S., Elahipanah, H., Rodriguez, S. & Zetterling, C.-M. (2018). 500 °c, High Current Linear Voltage Regulator in 4H-SiC BJT Technology. IEEE Electron Device Letters, 39(4), 548-551
Open this publication in new window or tab >>500 °c, High Current Linear Voltage Regulator in 4H-SiC BJT Technology
2018 (English)In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 39, no 4, p. 548-551Article in journal (Refereed) Published
Abstract [en]

This letter reports on a fully integrated 2-linear voltage regulator operational in a wide temperature range from 25 °C up to 500 °C fabricated in 4H-SiC technology. The circuit provides a stable output voltage with less than 1% variation in the entire temperature range. This letter demonstrates the first power supply solution providing both high-temperature (up to 500 °C) and high-load driving capabilities (up to 2).

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2018
Keywords
Bipolar junction transistor (BJT), high-temperature IC, linear voltage regulator (LVR), silicon carbide (SiC)
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-227638 (URN)10.1109/LED.2018.2805229 (DOI)000428689000022 ()2-s2.0-85041829681 (Scopus ID)
Funder
Swedish Foundation for Strategic Research Knut and Alice Wallenberg Foundation
Note

QC 20180514

Available from: 2018-05-14 Created: 2018-05-14 Last updated: 2018-05-14Bibliographically approved
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ORCID iD: ORCID iD iconorcid.org/0000-0001-8108-2631

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