Open this publication in new window or tab >>2018 (English)In: Materials Science in Semiconductor Processing, ISSN 1369-8001, E-ISSN 1873-4081, Vol. 81, p. 118-121Article in journal (Refereed) Published
Abstract [en]
The present paper focuses on the investigation of Al2O3/4H-SiC dielectric interface upon annealing, its consequent structural modifications, and the link to electrical properties. For this purpose, the test structures are prepared by depositing Al2O3, using atomic layer deposition (ALD), on low doped n-type 4H-SiC epitaxial layers. The structures are annealed from 300 degrees C to 1100 degrees C for different time duration (from 5 to 60 mins) and ambient such as, low vacuum (10(-1) Torr), N-2, and N2O. The structural studies on these samples are conducted using synchrotron-based high resolution x-ray photoelectron spectroscopy (HR-XPS), lab-based XPS, time of flight elastic recoil detection analysis (ToF-ERDA), and time of flight medium energy ion scattering (ToF-MEIS). The electrical response of capacitive structures is monitored through capacitance voltage (CV) measurements for as-deposited and annealed structures. It is found that the annealing at high temperatures, such as 1100 degrees C, and in N-2 or N2O environment, improves the dielectric properties due to the introduction of a thin layer of about 1 nm stable SiO2 between the Al2O3 and 4H-SiC.
Place, publisher, year, edition, pages
Elsevier, 2018
Keywords
4H-SiC, Al2O3, Dielectric interface, XPS, Annealing, MEIS
National Category
Materials Engineering
Identifiers
urn:nbn:se:kth:diva-226731 (URN)10.1016/j.mssp.2018.02.036 (DOI)000429746200020 ()2-s2.0-85044116454 (Scopus ID)
Funder
Swedish Research Council, D0674701
Note
QC 20180502
2018-05-022018-05-022024-03-15Bibliographically approved