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Izosimov, ViacheslavORCID iD iconorcid.org/0000-0003-1768-6697
Publications (10 of 29) Show all publications
Manhaeve, H. & Izosimov, V. (2017). Application scenarios. In: Dependable Multicore Architectures at Nanoscale: (pp. 93-104). Springer
Open this publication in new window or tab >>Application scenarios
2017 (English)In: Dependable Multicore Architectures at Nanoscale, Springer, 2017, p. 93-104Chapter in book (Other academic)
Abstract [en]

To illustrate the manufacturing threats addressed in Chap. "Manufacturing Threats" and the dependability threats elaborated in Chap. "Dependability Threats", this chapterwill address a number of application cases from different domains, such as automotive, railroad and transportation, air and space and medical, where safetycritical and reliable operations are key. It will address current practices deployed in these different domains and highlights the risks involved when the effects of the ever-scaling technologies and related design techniques on system reliability are not properly taken into consideration. Finally, the chapter will discuss hardware security, which is a common challenge in all the domains.

Place, publisher, year, edition, pages
Springer, 2017
National Category
Computer Systems
Identifiers
urn:nbn:se:kth:diva-220227 (URN)10.1007/978-3-319-54422-9_3 (DOI)2-s2.0-85036581967 (Scopus ID)9783319544229 (ISBN)9783319544212 (ISBN)
Note

QC 20171219

Available from: 2017-12-19 Created: 2017-12-19 Last updated: 2017-12-19Bibliographically approved
Izosimov, V., Paschalis, A., Reviriego, P. & Manhaeve, H. (2017). Application-specific solutions. In: Dependable Multicore Architectures at Nanoscale: (pp. 189-216). Springer
Open this publication in new window or tab >>Application-specific solutions
2017 (English)In: Dependable Multicore Architectures at Nanoscale, Springer, 2017, p. 189-216Chapter in book (Refereed)
Abstract [en]

This chapter discusses surface transportation applications, space applications, and medical applications in detail. It extends the discussion from Chap. 3 where we considered a broader variety of application domains and their relation to dependability. The choice of these applications is due to expertise of the authors and positioning of these applications in the overall dependability palette as ones of the most challenging yet different from each other.

Place, publisher, year, edition, pages
Springer, 2017
National Category
Computer Systems
Identifiers
urn:nbn:se:kth:diva-220228 (URN)10.1007/978-3-319-54422-9_6 (DOI)2-s2.0-85036541267 (Scopus ID)9783319544229 (ISBN)9783319544212 (ISBN)
Note

QC 20171219

Available from: 2017-12-19 Created: 2017-12-19 Last updated: 2017-12-19Bibliographically approved
Behere, S., Zhang, X., Izosimov, V. & Törngren, M. (2016). A Functional Brake Architecture for Autonomous Heavy Commercial Vehicles. In: SAE 2016 World Congress and Exhibition: . Paper presented at SAE 2016 World Congress and Exhibition, 12 April 2016 through 14 April 2016. sae international
Open this publication in new window or tab >>A Functional Brake Architecture for Autonomous Heavy Commercial Vehicles
2016 (English)In: SAE 2016 World Congress and Exhibition, sae international , 2016Conference paper, Published paper (Refereed)
Abstract [en]

Heavy commercial vehicles constitute the dominant form of inland freight transport. There is a strong interest in making such vehicles autonomous (self-driving), in order to improve safety and the economics of fleet operation. Autonomy concerns affect a number of key systems within the vehicle. One such key system is brakes, which need to remain continuously available throughout vehicle operation. This paper presents a fail-operational functional brake architecture for autonomous heavy commercial vehicles. The architecture is based on a reconfiguration of the existing brake systems in a typical vehicle, in order to attain dynamic, diversified redundancy along with desired brake performance. Specifically, the parking brake is modified to act as a secondary brake with capabilities for monitoring and intervention of the primary brake system. A basic fault tree analysis of the architecture indicates absence of single points of failure, and a reliability analysis shows that it is reasonable to expect about an order of magnitude improvement in overall system reliability. Copyright © 2016 SAE International.

Place, publisher, year, edition, pages
sae international, 2016
Keywords
Architecture, Automobiles, Brakes, Fault tree analysis, Fleet operations, Freight transportation, Reliability analysis, Vehicles, Brake performance, Brake systems, Freight transport, Heavy commercial vehicle, Parking brakes, Self drivings, System reliability, Vehicle operations, Commercial vehicles
National Category
Mechanical Engineering
Identifiers
urn:nbn:se:kth:diva-194605 (URN)10.4271/2016-01-0134 (DOI)2-s2.0-84979076118 (Scopus ID)
Conference
SAE 2016 World Congress and Exhibition, 12 April 2016 through 14 April 2016
Note

Correspondence Address: Behere, S.; Kungliga Tekniska Högskolan, Brinellvägen 83, Sweden; email: behere@kth.se. QC 20161101

Available from: 2016-11-01 Created: 2016-10-31 Last updated: 2017-11-13Bibliographically approved
Warg, F., Gassilewski, M., Tryggvesson, J., Izosimov, V., Werneman, A. & Johansson, R. (2016). Defining autonomous functions using iterative hazard analysis and requirements refinement. In: International Conference on Computer Safety, Reliability, and Security, SAFECOMP 2016 and International Workshop on Assurance Cases for Software-Intensive Systems, ASSURE 2016, Workshop on Dependable Embedded and Cyber-physical Systems and Systems-of-Systems, DECSoS 2016, 5th International Workshop on Next Generation of System Assurance Approaches for Safety-Critical Systems, SASSUR 2016, and 1st International Workshop on the Timing Performance in Safety Engineering, TIPS 2016: . Paper presented at 21 September 2016 through 23 September 2016 (pp. 286-297). Springer
Open this publication in new window or tab >>Defining autonomous functions using iterative hazard analysis and requirements refinement
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2016 (English)In: International Conference on Computer Safety, Reliability, and Security, SAFECOMP 2016 and International Workshop on Assurance Cases for Software-Intensive Systems, ASSURE 2016, Workshop on Dependable Embedded and Cyber-physical Systems and Systems-of-Systems, DECSoS 2016, 5th International Workshop on Next Generation of System Assurance Approaches for Safety-Critical Systems, SASSUR 2016, and 1st International Workshop on the Timing Performance in Safety Engineering, TIPS 2016, Springer, 2016, p. 286-297Conference paper, Published paper (Refereed)
Abstract [en]

Autonomous vehicles are predicted to have a large impact on the field of transportation and bring substantial benefits, but they present new challenges when it comes to ensuring safety. Today the standard ISO 26262:2011 treats each defined function, or item, as a complete scope for functional safety; the driver is responsible for anything that falls outside the items. With autonomous driving, it becomes necessary to ensure safety at all times when the vehicle is operating by itself. Therefore, we argue that the hazard analysis should have the wider scope of making sure the vehicle’s functions together fulfill its specifications for autonomous operation. The paper proposes a new iterative work process where the item definition is a product of hazard analysis and risk assessment rather than an input. Generic operational situation and hazard trees are used as a tool to widen the scope of the hazard analysis, and a method to classify hazardous events is used to find dimensioning cases among a potentially long list of candidates. The goal is to avoid dangerous failures for autonomous driving due to the specification of the nominal function being too narrow.

Place, publisher, year, edition, pages
Springer, 2016
Keywords
Autonomous vehicles, Functional safety, Hazard analysis, ISO 26262, Item definition, Safety goals, Crashworthiness, Embedded systems, Hazards, Iterative methods, Risk analysis, Risk assessment, Software reliability, Specifications, Systems engineering, Vehicles, Safety engineering
National Category
Vehicle Engineering Computer Systems
Identifiers
urn:nbn:se:kth:diva-195452 (URN)10.1007/978-3-319-45480-1_23 (DOI)000387734000026 ()2-s2.0-84988391801 (Scopus ID)9783319454795 (ISBN)
Conference
21 September 2016 through 23 September 2016
Note

QC 20161128

Available from: 2016-11-28 Created: 2016-11-03 Last updated: 2016-12-14Bibliographically approved
Ottavi, M., Pontarelli, S., Gizopoulos, D., Bolchini, C., Michael, M. K., Anghel, L., . . . Hamdioui, S. (2015). Dependable Multicore Architectures at Nanoscale: The View From Europe. IEEE Design & Test, 32(2), 17-28, Article ID 6905763.
Open this publication in new window or tab >>Dependable Multicore Architectures at Nanoscale: The View From Europe
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2015 (English)In: IEEE Design & Test, ISSN 2168-2356, Vol. 32, no 2, p. 17-28, article id 6905763Article in journal (Refereed) Published
Abstract [en]

The introduction of multicore chips allowed the constant increase in delivered performance otherwise impossible to achieve. Multiple microprocessor cores from different instruction set architectures stay at the epicenter of such chips and are surrounded by memory cores of different technologies, sizes and functionalities, as well as by peripheral controllers, special function cores, analog and mixed-signal cores, reconfigurable cores, etc. The functionality as well as the complexity of multicore chips is unprecedented.

Place, publisher, year, edition, pages
IEEE, 2015
National Category
Mechanical Engineering
Identifiers
urn:nbn:se:kth:diva-179123 (URN)10.1109/MDAT.2014.2359572 (DOI)000354407400003 ()2-s2.0-84926315110 (Scopus ID)
Note

QC 20151211

Available from: 2015-12-10 Created: 2015-12-10 Last updated: 2015-12-11Bibliographically approved
Izosimov, V., Ingelsson, U. & Wallin, A. (2012). Requirement Decomposition and Testability in Development of Safety-Critical Automotive Components. In: : . Paper presented at 31st International Conference on Computer Safety, Reliability, and Security, SAFECOMP 2012; Magdeburg; Germany (pp. 74-86). Springer
Open this publication in new window or tab >>Requirement Decomposition and Testability in Development of Safety-Critical Automotive Components
2012 (English)Conference paper, Published paper (Refereed)
Abstract [en]

2ISO26262 is a recently approved standard for functional safety in road vehicles. It provides guidelines on minimization of unreasonable safety risks during development of embedded systems in road vehicles. However, the development process specified in ISO26262 involves a number of steps that will require changing traditional and well established development processes. In a transition phase, however, due to lack of tool support, the steps may be performed manually, increasing the risk for delays and increased cost. This paper describes a case study in which we have successfully worked with traceability and testability of functional safety requirements, as well as safety requirements assigned to a testing tool that automates integration and verification steps, leading to standard-compliant tool qualification. Our tool qualification method employs fault injection as a validation method to increase confidence in the tool. Our case study will help to avoid many of the new pitfalls that can arise when attempting to realize standard-compliant development.

Place, publisher, year, edition, pages
Springer, 2012
Series
Lecture Notes in Computer Science, ISSN 0302-9743 ; 7612
National Category
Mechanical Engineering
Identifiers
urn:nbn:se:kth:diva-179473 (URN)10.1007/978-3-642-33678-2_7 (DOI)2-s2.0-84867588314 (Scopus ID)978-364233677-5 (ISBN)
Conference
31st International Conference on Computer Safety, Reliability, and Security, SAFECOMP 2012; Magdeburg; Germany
Note

QC 20160120

Available from: 2015-12-17 Created: 2015-12-17 Last updated: 2016-01-20Bibliographically approved
Izosimov, V., Pop, P., Eles, P. & Peng, Z. (2012). Scheduling and Optimization of Fault-Tolerant Embedded Systems with Transparency/Performance Trade-Offs. ACM Transactions on Embedded Computing Systems, 11(3), Article ID 61.
Open this publication in new window or tab >>Scheduling and Optimization of Fault-Tolerant Embedded Systems with Transparency/Performance Trade-Offs
2012 (English)In: ACM Transactions on Embedded Computing Systems, ISSN 1539-9087, E-ISSN 1558-3465, Vol. 11, no 3, article id 61Article in journal (Refereed) Published
Abstract [en]

In this article, we propose a strategy for the synthesis of fault-tolerant schedules and for the mapping of fault-tolerant applications. Our techniques handle transparency/performance trade-offs and use the fault-occurrence information to reduce the overhead due to fault tolerance. Processes and messages are statically scheduled, and we use process reexecution for recovering from multiple transient faults. We propose a fine-grained transparent recovery, where the property of transparency can be selectively applied to processes and messages. Transparency hides the recovery actions in a selected part of the application so that they do not affect the schedule of other processes and messages. While leading to longer schedules, transparent recovery has the advantage of both improved debuggability and less memory needed to store the fault-tolerant schedules.

Place, publisher, year, edition, pages
ACM Digital Library, 2012
National Category
Mechanical Engineering
Identifiers
urn:nbn:se:kth:diva-179127 (URN)10.1145/2345770.2345773 (DOI)000309671200003 ()
Note

QC 20160118

Available from: 2015-12-10 Created: 2015-12-10 Last updated: 2017-12-01Bibliographically approved
Izosimov, V., Di Guglielmo, G., Lora, M., Pravadelli, G., Fummi, F., Peng, Z. & Fujita, M. (2012). Time-Constraint-Aware Optimization of Assertions in Embedded Software. Journal of electronic testing, 28(4), 469-486
Open this publication in new window or tab >>Time-Constraint-Aware Optimization of Assertions in Embedded Software
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2012 (English)In: Journal of electronic testing, ISSN 0923-8174, E-ISSN 1573-0727, Vol. 28, no 4, p. 469-486Article in journal (Refereed) Published
Abstract [en]

Technology shrinking and sensitization have led to more and more transient faults in embedded systems. Transient faults are intermittent and non-predictable faults caused by external events, such as energetic particles striking the circuits. These faults do not cause permanent damages, but may affect the running applications. One way to ensure the correct execution of these embedded applications is to keep debugging and testing even after shipping of the systems, complemented with recovery/restart options. In this context, the executable assertions that have been widely used in the development process for design validation can be deployed again in the final product. In this way, the application will use the assertion to monitor itself under the actual execution and will not allow erroneous out-of-the-specification behavior to manifest themselves. This kind of software-level fault tolerance may represent a viable solution to the problem of developing commercial off-the-shelf embedded systems with dependability requirements. But software-level fault tolerance comes at a computational cost, which may affect time-constrained applications. Thus, the executable assertions shall be introduced at the best possible points in the application code, in order to satisfy timing constraints, and to maximize the error detection efficiency. We present an approach for optimization of executable assertion placement in time-constrained embedded applications for the detection of transient faults. In this work, assertions have different characteristics such as tightness, i.e., error coverage, and performance degradation. Taking into account these properties, we have developed an optimization methodology, which identifies candidate locations for assertions and selects a set of optimal assertions with the highest tightness at the lowest performance degradation. The set of selected assertions is guaranteed to respect the real-time deadlines of the embedded application. Experimental results have shown the effectiveness of the proposed approach, which provides the designer with a flexible infrastructure for the analysis of time-constrained embedded applications and transient-fault-oriented executable assertions.

Place, publisher, year, edition, pages
Springer Netherlands, 2012
National Category
Mechanical Engineering
Identifiers
urn:nbn:se:kth:diva-179126 (URN)10.1007/s10836-012-5316-1 (DOI)000308364300007 ()
Note

QC 20160118

Available from: 2015-12-10 Created: 2015-12-10 Last updated: 2017-12-01Bibliographically approved
Åström, A., Izosimov, V. & Örsmark, O. (2011). Efficient Software Tool Qualification for Automotive Safety-Critical Systems. In: : . Paper presented at VDI conference “Elektronik im Kraftfahrzeug”, Baden- Baden, Germany,12 - 13 Oct 2011 (pp. 361-370).
Open this publication in new window or tab >>Efficient Software Tool Qualification for Automotive Safety-Critical Systems
2011 (English)Conference paper, Published paper (Other academic)
National Category
Mechanical Engineering
Identifiers
urn:nbn:se:kth:diva-179480 (URN)
Conference
VDI conference “Elektronik im Kraftfahrzeug”, Baden- Baden, Germany,12 - 13 Oct 2011
Note

QC 20160107

Available from: 2015-12-17 Created: 2015-12-17 Last updated: 2016-01-07Bibliographically approved
Izosimov, V., Lora, M., Pravadelli, G., Fummi, F., Peng, Z., Di Guglielmo, G. & Fujita, M. (2011). Optimization of Assertion Placement in Time-Constrained Embedded Systems. In: : . Paper presented at European Test Symposium (ETS11), Trondheim, Norway. (pp. 171-176). IEEE
Open this publication in new window or tab >>Optimization of Assertion Placement in Time-Constrained Embedded Systems
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2011 (English)Conference paper, Published paper (Refereed)
Abstract [en]

We present an approach for optimization of assertion placement in time-constrained HW/SW modules for detection of errors due to transient and intermittent faults. During the design phases, these assertions have to be inserted into the executable code and, hence, will always be executed with the corresponding code branches. As the result, they can significantly increase execution time of a module, in particular, contributing to a much longer execution of the worst case, and cause deadline misses. Assertions have different characteristics such as tightness (or "local error coverage") and execution latency. Taking into account these properties can increase efficiency of assertion checks in time-constrained embedded HW/SW modules. We have developed a design optimization framework, which (1) identifies candidate locations for assertions, (2) associates a candidate assertion to each location, and (3) selects a set of assertions in terms of performance degradation and assertion tightness. Experimental results have shown the efficiency of the proposed techniques.

Place, publisher, year, edition, pages
IEEE, 2011
National Category
Mechanical Engineering
Identifiers
urn:nbn:se:kth:diva-179482 (URN)10.1109/ETS.2011.35 (DOI)000301771000029 ()2-s2.0-80051954237 (Scopus ID)
Conference
European Test Symposium (ETS11), Trondheim, Norway.
Note

QC 20160120

Available from: 2015-12-17 Created: 2015-12-17 Last updated: 2016-01-20Bibliographically approved
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ORCID iD: ORCID iD iconorcid.org/0000-0003-1768-6697

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