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Tenhunen, Hannu
Publications (10 of 54) Show all publications
Negash, B., Westerlund, T. & Tenhunen, H. (2019). Towards an interoperable Internet of Things through a web of virtual things at the Fog layer. Future generations computer systems, 91, 96-107
Open this publication in new window or tab >>Towards an interoperable Internet of Things through a web of virtual things at the Fog layer
2019 (English)In: Future generations computer systems, ISSN 0167-739X, E-ISSN 1872-7115, Vol. 91, p. 96-107Article in journal (Refereed) Published
Abstract [en]

A wide range of Internet of Things devices, platforms and applications have been implemented in the past decade. The variation in platforms, communication protocols and data formats of these systems creates islands of applications. Many organizations are working towards standardizing the technologies used at different layers of communication in these systems. However, interoperability still remains one of the main challenges towards realizing the grand vision of IoT. Intergration approaches proven in the existing Internet or enterprise applications are not suitable for the IoT, mainly due to the nature of the devices involved; the majority of the devices are resource constrained. To address this problem of interoperability, our work considers various types of IoT application domains, architecture of the IoT and the works of standards organizations to give a holistic abstract model of IoT. According to this model, there are three computing layers, each with a different level of interoperability needs — technical, syntactic or semantic. This work presents a Web of Virtual Things (WoVT) server that can be deployed at the middle layer of IoT (Fog layer) and Cloud to address the problem of interoperability. It exposes a REST like uniform interface for syntactic integration of devices at the bottom layer of IoT (perception layer). An additional RESTful api is used for integration with other similar WoVT servers at the Fog or the Cloud layer. The server uses a state of the art architecture to enable this integration pattern and provides means towards semantic interoperability. The analysis and evaluation of the implementation, such as performance, resource utilization and security perspectives, are presented. The simulation results demonstrate that an integrated and scalable IoT through the web of virtual things can be realized.

Place, publisher, year, edition, pages
Elsevier, 2019
Keywords
Architecture, Fog computing, Internet of Things, Interoperability, Thing description, Web of things, Fog, Integration, Semantics, Syntactics, Virtual addresses, Analysis and evaluation, Enterprise applications, Integration patterns, Resource utilizations, Semantic interoperability, Syntactic integration, Uniform interface
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:kth:diva-236325 (URN)10.1016/j.future.2018.07.053 (DOI)2-s2.0-85052999701 (Scopus ID)
Note

QC 20181120

Available from: 2018-11-20 Created: 2018-11-20 Last updated: 2018-12-17Bibliographically approved
Huan, Y., Xu, J., Zheng, L.-r., Tenhunen, H. & Zou, Z. (2018). A 3D Tiled Low Power Accelerator for Convolutional Neural Network. In: 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS): . Paper presented at IEEE International Symposium on Circuits and Systems (ISCAS), MAY 27-30, 2018, Florence, ITALY. IEEE
Open this publication in new window or tab >>A 3D Tiled Low Power Accelerator for Convolutional Neural Network
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2018 (English)In: 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), IEEE , 2018Conference paper, Published paper (Refereed)
Abstract [en]

It remains a challenge to run Deep Learning in devices with stringent power budget in the Internet-of-Things. This paper presents a low-power accelerator for processing Convolutional Neural Networks on the embedded devices. The power reduction is realized by exploring data reuse in three different aspects, with regards to convolution, filter and input features. A systolic-like data flow is proposed and applied to rows of Processing Elements (PEs), which facilitate reusing the data during convolution. Reuse of input features and filters is achieved by arranging the PE array in a 3D tiled architecture, whose dimension is 3 x 14 x 4. Local storage within PEs is therefore reduced and only cost 17.75 kB, which is 20% of the state-of-the-art. With dedicated delay chains in each PE, this accelerator is reconfigurable to suit various parameter settings of convolutional layers. Evaluated in UMC 65 nm low leakage process, the accelerator can reach a peak performance of 84 GOPS and consume only 136 mW at 250 Mhz.

Place, publisher, year, edition, pages
IEEE, 2018
Series
IEEE International Symposium on Circuits and Systems, ISSN 0271-4302
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-240033 (URN)000451218701203 ()978-1-5386-4881-0 (ISBN)
Conference
IEEE International Symposium on Circuits and Systems (ISCAS), MAY 27-30, 2018, Florence, ITALY
Note

QC 20181210

Available from: 2018-12-10 Created: 2018-12-10 Last updated: 2018-12-10Bibliographically approved
Zahra, A., Shahid, H., Riaz, M. A., Amin, Y. & Tenhunen, H. (2018). A chipless RFID tag for smart temporal applications. International Journal of RF and Microwave Computer-Aided Engineering, 28(8), Article ID e21405.
Open this publication in new window or tab >>A chipless RFID tag for smart temporal applications
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2018 (English)In: International Journal of RF and Microwave Computer-Aided Engineering, ISSN 1096-4290, E-ISSN 1099-047X, Vol. 28, no 8, article id e21405Article in journal (Refereed) Published
Abstract [en]

A compact, robust, chipless radio frequency identification (RFID) tag is proposed. Resonant elements patterned in a concentric fashion encode data in the spectral domain employing frequency shift encoding. The proposed tag encodes 28.25 data bits over a miniscule physical footprint of 25 x 25 mm(2). The formulated scheme is demonstrated to be viable for encoding of temporal variables. The electromagnetic performance of the presented design is investigated for different laminates: Rogers RT/duroid (R) 5880 and Taconic TLX-0. Multiple tag prototypes employing a variety of substrates are realized and evaluated for in-laboratory performance. The proposed design is compared with existing work reported in literature. Code density of 4.52 bits/cm(2) has been successfully achieved. The tag design operates from 3.07 to 10.6 GHz and is readily realizable on flexible laminates. Smart retail, intelligent packaging, adaptive ticketing, and similar time-related applications can be materialized using the proposed tag.

Place, publisher, year, edition, pages
WILEY, 2018
Keywords
chipless tag, electromagnetic, flexibility, Frequency Shift Encoding, Radio Frequency, Radio Frequency Identification, Radar Cross-Section
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-235560 (URN)10.1002/mmce.21405 (DOI)000444953200007 ()2-s2.0-85045749202 (Scopus ID)
Note

QC 20181001

Available from: 2018-10-01 Created: 2018-10-01 Last updated: 2018-10-01Bibliographically approved
Akhtar, F., Naqvi, S. I., Arshad, F., Amin, Y. & Tenhunen, H. (2018). A Flexible and Compact Semicircular Antenna for Multiple Wireless Communication Applications. Radioengineering, 27(3), 671-678
Open this publication in new window or tab >>A Flexible and Compact Semicircular Antenna for Multiple Wireless Communication Applications
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2018 (English)In: Radioengineering, ISSN 1210-2512, E-ISSN 1805-9600, Vol. 27, no 3, p. 671-678Article in journal (Refereed) Published
Abstract [en]

This work presents a compact, quad-band planar antenna intended for assimilation into flexible and conformal devices. The CPW-fed semicircular shaped prototype with rake-shaped slots is designed, realized and characterized experimentally. The frequency bands covered by the proposed radiator are centered at 2.5, 3.7, 5.5 and 8 GHz with measured impedance bandwidths of 16%, 13.5%, 11.8% and 14.63%, respectively. The proposed antenna is thus enabled to support WLAN, ISM, Bluetooth, WiMAX LTE and X-band applications. The antenna exhibits a significant gain. The radiation characteristics of the proposed radiator are measured in concave and convex bent shapes at various radii to analyze its flexibility. Performance of the antenna remains almost unaffected in the bent situation. Measurements demonstrate good coherence with simulations. The compactness and good performance of the design both in bent and unbent conditions proves it to be the better contender for future multiband conformal wireless applications.

Place, publisher, year, edition, pages
SPOLECNOST PRO RADIOELEKTRONICKE INZENYRSTVI, 2018
Keywords
Quad-band, CPW-feedline, flexible substrate, WLAN, WiMAX
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-235596 (URN)10.13164/re.2018.0671 (DOI)000444598500006 ()2-s2.0-85053290001 (Scopus ID)
Note

QC 20181001

Available from: 2018-10-01 Created: 2018-10-01 Last updated: 2018-10-01Bibliographically approved
Kelati, A., Ben Dhaou, I., Taajamaa, V., Rwegasira, D., Kondoro, A., Tenhunen, H. & Mvungi, N. (2018). CHALLENGES FOR TEACHING AND LEARNING ACTIVITIES (TLA) AT ENGINEERING EDUCATION. In: Chova, LG Martinez, AL Torres, IC (Ed.), 12TH INTERNATIONAL TECHNOLOGY, EDUCATION AND DEVELOPMENT CONFERENCE (INTED): . Paper presented at 12th International Technology, Education and Development Conference (INTED), MAR 05-07, 2018, Valencia, SPAIN (pp. 9093-9098). IATED-INT ASSOC TECHNOLOGY EDUCATION & DEVELOPMENT
Open this publication in new window or tab >>CHALLENGES FOR TEACHING AND LEARNING ACTIVITIES (TLA) AT ENGINEERING EDUCATION
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2018 (English)In: 12TH INTERNATIONAL TECHNOLOGY, EDUCATION AND DEVELOPMENT CONFERENCE (INTED) / [ed] Chova, LG Martinez, AL Torres, IC, IATED-INT ASSOC TECHNOLOGY EDUCATION & DEVELOPMENT , 2018, p. 9093-9098Conference paper, Published paper (Refereed)
Abstract [en]

In the knowledge-based society, the legacy education system does not provide the needed skills for creative engineers especially enhancing student innovation and entrepreneurship capacity. Triple-helix model is a concept that aims to bond universities, industry and government in a bid to create innovations. In Europe, integrating research, education, and innovation together in a comprehensive manner has been the major driving force for local and European university development, as example in the form of European Institute Innovation Technology (EIT). At KTH, there are activities that alien the Teaching and Learning Activities (TLA) with different task group with the aim of creating a mutual innovation capacity to contribute solutions for major social challenges. Some of these task groups are Cross-Cultural Faculty Development for Challenge Driven Education, Global learning and digital platform and open innovation platform for learning. The progress and the success are measured by the number of joint student teams and their skills, knowledge development with the follow-up workshop, and the ongoing research and results of the socio-oriented projects. To enhance TLA and the teaching and learning practices, we have developed new curriculums (MSc. and PhD) for our partners to spark innovation and entrepreneurship where the students interact with Open Lab activities. The assessments show that the enrolled students have gained creative skills in dealing with engineering problem and consolidate their knowledge to improve the future TLA and the Intended Learning Outcome (ILO).

Place, publisher, year, edition, pages
IATED-INT ASSOC TECHNOLOGY EDUCATION & DEVELOPMENT, 2018
Series
INTED Proceedings, ISSN 2340-1079
Keywords
Teaching and Learning Activities, Engineering Education, Digital platform Innovation, technology, research projects
National Category
Learning
Identifiers
urn:nbn:se:kth:diva-239518 (URN)000448704004017 ()978-84-697-9480-7 (ISBN)
Conference
12th International Technology, Education and Development Conference (INTED), MAR 05-07, 2018, Valencia, SPAIN
Available from: 2018-11-27 Created: 2018-11-27 Last updated: 2018-11-27Bibliographically approved
Ahmad, A., Arshad, F., Naqvi, S. I., Amin, Y. & Tenhunen, H. (2018). Design, Fabrication, and Measurements of Extended L-Shaped Multiband Antenna for Wireless Applications. Applied Computational Electromagnetics Society Journal, 33(4), 388-393
Open this publication in new window or tab >>Design, Fabrication, and Measurements of Extended L-Shaped Multiband Antenna for Wireless Applications
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2018 (English)In: Applied Computational Electromagnetics Society Journal, ISSN 1054-4887, Vol. 33, no 4, p. 388-393Article in journal (Refereed) Published
Abstract [en]

This article expounds a multi-band compact shaped antenna, which is based on CPW ground plane. FR-4 with a thickness of 1.6 mm is used as a substrate for the proposed antenna. The proposed antenna is capable of operating at 1.56 GHz for (Global Positioning System), 2.45 GHz (Wireless Local Area Network) and 4.49 GHz (Aeronautical Mobile Telemetry (AMT) fixed services). The efficiency at 1.56, 2.45, and 4.49 GHz is 79.7, 76.9 and 76.7%, respectively. The VSWR of the presented antenna is less than 1.5 at all the desired resonance modes, which confirms its good impedance matching. The performance of the proposed antenna is evaluated in terms of VSWR, return loss, radiation pattern and efficiency. CST (R) MWS (R) software is used for simulations. In order to validate the simulation results, a prototype of the designed antenna is fabricated and a good agreement is found between the simulated and measured results.

Place, publisher, year, edition, pages
Applied Computational Electromagnetics Society (ACES), 2018
Keywords
AMT Fixed Services, GPS, multiband antenna, Wi-Fi
National Category
Communication Systems
Identifiers
urn:nbn:se:kth:diva-230550 (URN)000432579800004 ()2-s2.0-85047297336 (Scopus ID)
Funder
VINNOVA
Note

QC 20180724

Available from: 2018-07-24 Created: 2018-07-24 Last updated: 2018-07-24Bibliographically approved
Satti, J. A., Habib, A., Anam, H., Zeb, S., Amin, Y., Loo, J. & Tenhunen, H. (2018). Miniaturized humidity and temperature sensing RFID enabled tags. International Journal of RF and Microwave Computer-Aided Engineering, 28(1), Article ID e21151.
Open this publication in new window or tab >>Miniaturized humidity and temperature sensing RFID enabled tags
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2018 (English)In: International Journal of RF and Microwave Computer-Aided Engineering, ISSN 1096-4290, E-ISSN 1099-047X, Vol. 28, no 1, article id e21151Article in journal (Refereed) Published
Abstract [en]

A compact 27-bit linearly polarized chipless radio frequency identification tag is presented in this research. The proposed tag is designed with an overall tag dimension of 23 x 23 mm(2). The tag comprises of metallic (copper) rings-based structure loaded with slots. These slots correspond to a particular sequence of bits. The circular tag is analysed using 2 different substrates, that is, Rogers RT/duroid/5870 and flexible Rogers RT/duroid/5880. The radar cross-section response of frequency signatured tag is analysed for humidity and temperature sensor designs. Humidity sensing is achieved by deploying a DuPont Kapton HN heat resistant sheet on the shortest slot of the tag, that is, the sensing slot. Temperature sensing is attained using Rogers RT/duroid/5870 and Stanyl polyamide as a combined substrate. Hence, the miniaturized, robust, and flexible tag can be deployed over irregular surfaces for sensing purposes.

National Category
Other Materials Engineering
Identifiers
urn:nbn:se:kth:diva-220587 (URN)10.1002/mmce.21151 (DOI)000418083500001 ()2-s2.0-85026320067 (Scopus ID)
Note

QC 20180123

Available from: 2018-01-23 Created: 2018-01-23 Last updated: 2018-01-23Bibliographically approved
Riaz, M. A., Abdullah, Y., Shahid, H., Amin, Y., Akram, A. & Tenhunen, H. (2018). Novel Butterfly Slot Based Chipless RFID Tag. Radioengineering, 27(3), 776-783
Open this publication in new window or tab >>Novel Butterfly Slot Based Chipless RFID Tag
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2018 (English)In: Radioengineering, ISSN 1210-2512, E-ISSN 1805-9600, Vol. 27, no 3, p. 776-783Article in journal (Refereed) Published
Abstract [en]

A compact chipless RFID tag with robust readable features is presented in this paper. The tag is made up of novel concentric butterfly slot resonators. Bit data is encoded in the frequency signature of the tag. Each slot corresponds to a resonance peak representing a bit '1', whereas an absence of the peak signifies a bit '0'. Proposed resonator design demonstrates insensitivity to different polarization and incident angles of the linearly polarized impinging electromagnetic wave. The tag operates in the frequency band of 4.7-9.7 GHz, limited within the license free ultra wide-band. Rogers RT/duroid (R) 5880 substrate is used to realize a 10-bit capacity design that spans 14 x 14 mm(2) resulting in a bit density of 5.1 bits/cm(2).

Place, publisher, year, edition, pages
SPOLECNOST PRO RADIOELEKTRONICKE INZENYRSTVI, 2018
Keywords
Radio frequency identification (RFID), chipless tag, electromagnetic signature, Radar Cross-Section (RCS)
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-235597 (URN)10.13164/re.2018.0776 (DOI)000444598500020 ()2-s2.0-85053318143 (Scopus ID)
Note

QC 20181001

Available from: 2018-10-01 Created: 2018-10-01 Last updated: 2018-10-01Bibliographically approved
Negash, B., Westerlund, T., Liljeberg, P. & Tenhunen, H. (2018). Rethinking ‘Things’ - Fog layer interplay in IoT: A mobile code approach. In: 11th IFIP WG 8.9 Working Conference on Research and Practical Issues of Enterprise Information Systems, CONFENIS 2017: . Paper presented at 11th IFIP WG 8.9 Working Conference on Research and Practical Issues of Enterprise Information Systems, CONFENIS 2017, Shanghai, China, 18 October 2017 through 20 October 2017 (pp. 159-167). Springer, 310
Open this publication in new window or tab >>Rethinking ‘Things’ - Fog layer interplay in IoT: A mobile code approach
2018 (English)In: 11th IFIP WG 8.9 Working Conference on Research and Practical Issues of Enterprise Information Systems, CONFENIS 2017, Springer, 2018, Vol. 310, p. 159-167Conference paper, Published paper (Refereed)
Abstract [en]

A client-server architecture style is one of the common approaches enabling separation of concerns in distributed systems. In the Internet of Things architecture, this approach exists in different configuration of sensors, actuators, gateways in the Fog layer and servers in the Cloud. This configuration affects the degree of interoperability, scalability and other functional and non-functional system requirements. In this paper, we reflect on best practices in the web and REST style to address IoT challenges; one of the constraints in REST, Code on Demand, is used for IoT to enhance the flexibility and interoperability of resource constrained clients at the perception layer. Scripts written in a domain specific language, DoS-IL, are organized and stored at the Fog layer for sensor and actuators nodes to request and execute the incoming script. A generic application layer protocol and RESTful server are presented along with experimental results.

Place, publisher, year, edition, pages
Springer, 2018
Series
Lecture Notes in Business Information Processing, ISSN 1865-1348 ; 310
Keywords
Architecture, DoS-IL, Fog computing, Internet of things, Interoperability, Programmability, Scalability
National Category
Computer Engineering
Identifiers
urn:nbn:se:kth:diva-238402 (URN)10.1007/978-3-319-94845-4_14 (DOI)2-s2.0-85049929664 (Scopus ID)9783319948447 (ISBN)
Conference
11th IFIP WG 8.9 Working Conference on Research and Practical Issues of Enterprise Information Systems, CONFENIS 2017, Shanghai, China, 18 October 2017 through 20 October 2017
Note

QC 20181108

Available from: 2018-11-08 Created: 2018-11-08 Last updated: 2018-11-08Bibliographically approved
Dhaou, I. B., Skhiri, H. & Tenhunen, H. (2018). Study and implementation of a secure random number generator for DSRC devices. In: 2017 9th IEEE-GCC Conference and Exhibition, GCCCE 2017: . Paper presented at 9th IEEE-GCC Conference and Exhibition, GCCCE 2017, 8 May 2017 through 11 May 2017. Institute of Electrical and Electronics Engineers Inc.
Open this publication in new window or tab >>Study and implementation of a secure random number generator for DSRC devices
2018 (English)In: 2017 9th IEEE-GCC Conference and Exhibition, GCCCE 2017, Institute of Electrical and Electronics Engineers Inc. , 2018Conference paper, Published paper (Refereed)
Abstract [en]

This work presents an algorithm to select a low-cost modulus for the implementation of Blum Blum Shub pseudorandom number generator in an FPGA device. Additionally, it elaborates a low-latency architecture for the BBS algorithm suitable for the security service of the IEEE 1609.2 standard. The architecture uses diminished-1 arithmetic and is log2($N$) faster than previously reported implementation using Montgomery multiplier. The architecture is able to implement 224-bit and 256-bit BBS sequences. Synthesis results show that the latencies for the 224-bit and 256-bit BBS are, respectively, 1.12μs and 1.28μs.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers Inc., 2018
Keywords
Digital arithmetic, Elliptic curves, Field programmable gate array, Random number generator, Vehicle ad hoc networks, Field programmable gate arrays (FPGA), Network architecture, Number theory, Vehicular ad hoc networks, Elliptic curve, FPGA devices, Low latency, Montgomery multipliers, Pseudo random number generators, Random number generators, Security services, Vehicle ad-hoc networks, Random number generation
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-238000 (URN)10.1109/IEEEGCC.2017.8448202 (DOI)2-s2.0-85053936883 (Scopus ID)9781538627563 (ISBN)
Conference
9th IEEE-GCC Conference and Exhibition, GCCCE 2017, 8 May 2017 through 11 May 2017
Note

Conference code: 139101; Export Date: 30 October 2018; Conference Paper

QC 20190115

Available from: 2019-01-15 Created: 2019-01-15 Last updated: 2019-01-15Bibliographically approved
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