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Zhu, Z., Su, P., Sean, Z., Huang, J., Ottikkutti, S., Tahmasebi, K. N., . . . Chen, D. (2023). Using a VAE-SOM architecture for anomaly detection of flexible sensors in limb prosthesis. Journal of Industrial Information Integration, 35, Article ID 100490.
Open this publication in new window or tab >>Using a VAE-SOM architecture for anomaly detection of flexible sensors in limb prosthesis
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2023 (English)In: Journal of Industrial Information Integration, ISSN 2452-414X, Vol. 35, article id 100490Article in journal (Refereed) Published
Abstract [en]

Flexible wearable sensor electronics, combined with advanced software functions, pave the way toward increasingly intelligent healthcare devices. One important application area is limb prosthesis, where printed flexible sensor solutions enable efficient monitoring and assessing of the actual intra-socket dynamic operation conditions in clinical and other more natural environments. However, the data collected by such sensors suffer from variations and errors, leading to difficulty in perceiving the actual operational conditions. This paper proposes a novel method for detecting anomalies in the data that are collected for measuring the intra-socket dynamic operation conditions by printed flexible wearable sensors. A discrete generative model based on Variational AutoEncoder (VAE) is used first to encode the collected multi-variant time-series data in terms of latent states. After that, a clustering method based on the Self-Organizing Map (SOM) is used to acquire discrete and interpretable representations of the VAE encoded latent states. An adaptive Markov chain is utilized to detect anomalies by quantifying state transitions and revealing temporal dependencies. The contributions of the proposed architecture conclude as follows: (1) Using the VAE-SOM hybrid model to regularize the continues data as discrete states, supporting interpreting the operational data to analytic models. (2) Employing adaptive Markov chains to generalize the transitions of these states, allowing to model the complex operational conditions. Compared with benchmark methods, our architecture is validated via two public datasets and achieves the best F1 scores. Moreover, we measure the run-time performance of this lightweight architecture. The results indicate that the proposed method performs low computational complexity, facilitating the applications on real-life productions.

Place, publisher, year, edition, pages
Elsevier BV, 2023
National Category
Engineering and Technology
Identifiers
urn:nbn:se:kth:diva-333982 (URN)10.1016/j.jii.2023.100490 (DOI)001045906000001 ()2-s2.0-85165005873 (Scopus ID)
Funder
EU, Horizon Europe, 825429
Note

QC 20230816

Available from: 2023-08-15 Created: 2023-08-15 Last updated: 2025-03-20Bibliographically approved
Jin, Y., Xu, J., Huan, Y., Yan, Y., Zheng, L.-r. & Zou, Z. (2019). Energy-Aware Workload Allocation for Distributed Deep Neural Networks in Edge-Cloud Continuum. In: International System on Chip Conference: . Paper presented at 32nd IEEE International System on Chip Conference, SOCC 2019, 3 September 2019 through 6 September 2019 (pp. 213-217). IEEE Computer Society
Open this publication in new window or tab >>Energy-Aware Workload Allocation for Distributed Deep Neural Networks in Edge-Cloud Continuum
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2019 (English)In: International System on Chip Conference, IEEE Computer Society , 2019, p. 213-217Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents an energy-aware workload allocation framework for Distributed Deep Neural Networks (DNNs) in the Edge-Cloud continuum. As opposed to conventional approaches where the inference is performed in a standalone device, a computing-communication mode is proposed to distribute computing tasks of different layers of DNNs to different levels of the Edge-Cloud network to achieve the minimum energy cost per inference. The optimal exit layer (EL) can be determined where the intermediate data of the neural networks are transmitted to the higher level in the Edge-Cloud continuum. Case studies are illustrated for AlexNet and VGG-16 considering a set of DNN processors and wireless interfaces. Using the GPU GTX1080 with 22.8 GOPS/W and the WiFi with 10 nJ/bit transmission efficiency, the optimized energy consumption for AlexNet is estimated to be 0.016 J when the inference exits from the edge at the EL2 (Conv1) layer. For VGG-16, the optimal EL is EL1 with the minimum inference cost of 0.0482 J. 

Place, publisher, year, edition, pages
IEEE Computer Society, 2019
Keywords
Energy utilization, Multilayer neural networks, Power management (telecommunication), Programmable logic controllers, Computing communication, Conventional approach, Distribute computing, Minimum energy costs, Stand-alone devices, Transmission efficiency, Wireless interfaces, Workload allocation, Deep neural networks
National Category
Communication Systems
Identifiers
urn:nbn:se:kth:diva-285424 (URN)10.1109/SOCC46988.2019.1570554761 (DOI)000783951100041 ()2-s2.0-85085164902 (Scopus ID)
Conference
32nd IEEE International System on Chip Conference, SOCC 2019, 3 September 2019 through 6 September 2019
Note

QC 20201130

Part of ISBN 9781728134826

Available from: 2020-11-30 Created: 2020-11-30 Last updated: 2024-10-25Bibliographically approved
Weng, Z., Qin, J., Umar, A. A., Wang, J., Zhang, X., Wang, H., . . . Zhan, Y. (2019). Lead-Free Cs2BiAgBr6 Double Perovskite-Based Humidity Sensor with Superfast Recovery Time. Advanced Functional Materials, 29(24), Article ID 1902234.
Open this publication in new window or tab >>Lead-Free Cs2BiAgBr6 Double Perovskite-Based Humidity Sensor with Superfast Recovery Time
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2019 (English)In: Advanced Functional Materials, ISSN 1616-301X, E-ISSN 1616-3028, Vol. 29, no 24, article id 1902234Article in journal (Refereed) Published
Abstract [en]

Lead halide perovskites have demonstrated outstanding achievements in photoelectric applications owing to their unique properties. However, the moisture sensitivity of lead halide perovskite has rarely been developed into an applicable humidity sensor due to the intrinsic instability and toxicity issue. Herein, as a highly stable lead-free perovskite, a Cs2BiAgBr6 thin film is chosen to be the active material for humidity sensor due to its extraordinary humidity-dependent electrical properties and good stability. This Cs2BiAgBr6 thin film humidity sensor demonstrates a superfast response time (1.78 s) and recovery time (0.45 s). The superfast response and recovery properties can be attributed to the reversible physisorption of water molecules, which can be easily adsorbed onto or desorbed from the thin film surface. Moreover, the sensor also shows an excellent reliability and stability properties as well as logarithmic linearity in a relative humidity's range of 15% to 78%. The lead-free Cs2BiAgBr6 perovskite possesses great potential for application in real-time humidity sensing.

Place, publisher, year, edition, pages
WILEY-V C H VERLAG GMBH, 2019
Keywords
Cs2BiAgBr6, humidity sensor, lead-free perovskite, superfast recovery
National Category
Materials Engineering
Identifiers
urn:nbn:se:kth:diva-270671 (URN)10.1002/adfm.201902234 (DOI)000471074000019 ()2-s2.0-85064525066 (Scopus ID)
Note

QC 20200311

Available from: 2020-03-11 Created: 2020-03-11 Last updated: 2024-01-08Bibliographically approved
Huan, Y., Xu, J., Zheng, L.-r., Tenhunen, H. & Zou, Z. (2018). A 3D Tiled Low Power Accelerator for Convolutional Neural Network. In: 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS): . Paper presented at IEEE International Symposium on Circuits and Systems (ISCAS), MAY 27-30, 2018, Florence, ITALY. IEEE
Open this publication in new window or tab >>A 3D Tiled Low Power Accelerator for Convolutional Neural Network
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2018 (English)In: 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), IEEE , 2018Conference paper, Published paper (Refereed)
Abstract [en]

It remains a challenge to run Deep Learning in devices with stringent power budget in the Internet-of-Things. This paper presents a low-power accelerator for processing Convolutional Neural Networks on the embedded devices. The power reduction is realized by exploring data reuse in three different aspects, with regards to convolution, filter and input features. A systolic-like data flow is proposed and applied to rows of Processing Elements (PEs), which facilitate reusing the data during convolution. Reuse of input features and filters is achieved by arranging the PE array in a 3D tiled architecture, whose dimension is 3 x 14 x 4. Local storage within PEs is therefore reduced and only cost 17.75 kB, which is 20% of the state-of-the-art. With dedicated delay chains in each PE, this accelerator is reconfigurable to suit various parameter settings of convolutional layers. Evaluated in UMC 65 nm low leakage process, the accelerator can reach a peak performance of 84 GOPS and consume only 136 mW at 250 Mhz.

Place, publisher, year, edition, pages
IEEE, 2018
Series
IEEE International Symposium on Circuits and Systems, ISSN 0271-4302
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-240033 (URN)10.1109/ISCAS.2018.8351301 (DOI)000451218701203 ()2-s2.0-85057087284 (Scopus ID)978-1-5386-4881-0 (ISBN)
Conference
IEEE International Symposium on Circuits and Systems (ISCAS), MAY 27-30, 2018, Florence, ITALY
Note

QC 20181210

Available from: 2018-12-10 Created: 2018-12-10 Last updated: 2024-01-08Bibliographically approved
Liu, L., Jin, Y., Liu, Y., Ma, N., Huan, Y., Zou, Z. & Zheng, L. (2018). A Design of Autonomous Error-Tolerant Architectures for Massively Parallel Computing. IEEE Transactions on Very Large Scale Integration (vlsi) Systems, 26(10), 2143-2154
Open this publication in new window or tab >>A Design of Autonomous Error-Tolerant Architectures for Massively Parallel Computing
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2018 (English)In: IEEE Transactions on Very Large Scale Integration (vlsi) Systems, ISSN 1063-8210, E-ISSN 1557-9999, Vol. 26, no 10, p. 2143-2154Article in journal (Refereed) Published
Abstract [en]

The massively parallel computing systems composed of many processors are connected on chips, which will become more and more complex and unreliable. This paper presents an error-tolerant design based on the autonomous error-tolerant (AET) architecture that aims to have a self-repairing capability. A nearby error sensing mechanism is designed to discover faults, and an active evolution scheme is studied to handle unrecoverable errors. A circuit backup switching mechanism is proposed to bypass the failed nodes. The board-level prototype is implemented based on dual-core embedded processors. The analysis shows that the error-tolerant capability of the proposed architecture is better than the conventional multimodular redundant system when the failure rate of a single core is less than 0.7. In the AET test system consisting of 16 processors, the error-tolerant capability is verified. The results show that the relative variation of the overall performance of the AET system will not be changed due to the high reliability requirements of the system. Through experimental comparison, under the premise that the architecture of AET and the triple modular redundancy method are basically consistent in reliability, whether on the logical-level error tolerant or on the physical-level error tolerant, the former has lower power consumption.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2018
Keywords
Error tolerant, nanosystem, self-reparation, sensing
National Category
Computer Engineering
Identifiers
urn:nbn:se:kth:diva-237109 (URN)10.1109/TVLSI.2018.2846298 (DOI)000446332500029 ()2-s2.0-85049490607 (Scopus ID)
Note

QC 20181030

Available from: 2018-10-30 Created: 2018-10-30 Last updated: 2024-03-18Bibliographically approved
Yang, K., Yuan, S., Zhan, Y., Zheng, L.-r. & Seoane, F. (2018). A flexible artificial synapse for neuromorphic system. In: 2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC): . Paper presented at Conference on Electron Devices and Solid-State Circuits (EDSSC), Shenzhen, China, June 6-8, 2018.. IEEE conference proceedings
Open this publication in new window or tab >>A flexible artificial synapse for neuromorphic system
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2018 (English)In: 2018 IEEE International Conference on Electron Devices and Solid State Circuits (EDSSC), IEEE conference proceedings, 2018Conference paper, Published paper (Refereed)
Abstract [en]

Neuromorphic computing, as a new paradigm, highlighted for its highly parallel, energy efficient features, has attracted a lot of attention. The hardware implementation for a neuromorphic system proposes the strong desire for suitable building blocks. The synaptic device is a very promising solution because of its stimulation-history-related response, which fits the nature of a neural network. In this work, an artificial synapse based on a memristive transistor fabricated by a simple process is realized. The device not only shows multi-level states which is the main feature of a memristor and is essential to hardware implementation neuromorphic system, but also exhibits physical flexibility, a feature that supports wearable and portable electronics. On this basis, a proof-of-feasibility simulation using the experimental data is performed to realize the pattern classification.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2018
Keywords
Flexible, Memristive, Neuromorphic, Synapse
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-235722 (URN)10.1109/EDSSC.2018.8487170 (DOI)2-s2.0-85056316042 (Scopus ID)
Conference
Conference on Electron Devices and Solid-State Circuits (EDSSC), Shenzhen, China, June 6-8, 2018.
Note

QC 20181008

Available from: 2018-10-03 Created: 2018-10-03 Last updated: 2024-01-08Bibliographically approved
Bao, D., Zou, Z., Nejad, M. B., Qin, Y. & Zheng, L.-r. (2018). A Wirelessly Powered UWB RFID Sensor Tag With Time-Domain Analog-to-Information Interface. IEEE Journal of Solid-State Circuits, 53(8), 2227-2239
Open this publication in new window or tab >>A Wirelessly Powered UWB RFID Sensor Tag With Time-Domain Analog-to-Information Interface
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2018 (English)In: IEEE Journal of Solid-State Circuits, ISSN 0018-9200, E-ISSN 1558-173X, Vol. 53, no 8, p. 2227-2239Article in journal (Refereed) Published
Abstract [en]

This paper presents a wirelessly powered radio frequency identification sensor tag with an analog-to-information interface. A time-domain interface, incorporating an ultra-lowpower impulse radio ultra-wideband (IR-UWB) transmitter (TX), is employed. The analog signal from the sensor is compared with a triangular waveform, resulting in a pulse-position modulation signal to trigger UWB pulses. Thanks to the high time-resolution IR-UWB radio, time intervals of the impulses can be used to represent the original input value, which is measured remotely on the reader side by a time-of-arrival estimator. This approach not only eliminates the analog-to-digital converter (ADC) but also significantly reduces the number of bits to be transmitted for power saving. The proposed tag is fabricated in a 0.18-mu m CMOS process with an active area of 2.5 mm(2). The measurement results demonstrate that a 300-kS/s sampling rate with a 6.7-bit effective number of bits (ENOB) is obtained via a UWB receiver with a sensitivity of -93 dBm and an integration window of 10 ns. The ENOB is improved to 7.3 bits when the integration window is reduced to 2 ns. The tag can be powered up by a -18-dBm UHF input signal. The power consumption of the proposed tag is 41.5 mu W yielding a 1.3-pJ/conv.step figure of merit, offering 9x and 67x improvements compared with the state of the art based on an ADC and a backscattering TX, and the tag based on an ADC and a narrowband TX, respectively.

Place, publisher, year, edition, pages
IEEE, 2018
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-232874 (URN)10.1109/JSSC.2018.2825455 (DOI)000439617800007 ()2-s2.0-85046409108 (Scopus ID)
Note

QC 20180810

Available from: 2018-08-10 Created: 2018-08-10 Last updated: 2024-01-08Bibliographically approved
Tu, L., Yuan, S., Zhang, H., Wang, P., Cui, X., Wang, J., . . . Zheng, L.-r. (2018). Aerosol jet printed silver nanowire transparent electrode for flexible electronic application. Journal of Applied Physics, 123(17), Article ID 174905.
Open this publication in new window or tab >>Aerosol jet printed silver nanowire transparent electrode for flexible electronic application
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2018 (English)In: Journal of Applied Physics, ISSN 0021-8979, E-ISSN 1089-7550, Vol. 123, no 17, article id 174905Article in journal (Refereed) Published
Abstract [en]

Aerosol jet printing technology enables fine feature deposition of electronic materials onto low-temperature, non-planar substrates without masks. In this work, silver nanowires (AgNWs) are proposed to be printed into transparent flexible electrodes using a Maskless Mesoscale Material Deposition Aerosol Jet VR printing system on a glass substrate. The influence of the most significant process parameters, including printing cycles, printing speed, and nozzle size, on the performance of AgNW electrodes was systematically studied. The morphologies of printed patterns were characterized by scanning electron microscopy, and the transmittance was evaluated using an ultraviolet-visible spectrophotometer. Under optimum conditions, high transparent AgNW electrodes with a sheet resistance of 57.68 X/sq and a linewidth of 50.9 mu m were obtained, which is an important step towards a higher performance goal for flexible electronic applications.

Place, publisher, year, edition, pages
AMER INST PHYSICS, 2018
National Category
Materials Chemistry
Identifiers
urn:nbn:se:kth:diva-228263 (URN)10.1063/1.5028263 (DOI)000431651600029 ()2-s2.0-85046853029 (Scopus ID)
Note

QC 20180523

Available from: 2018-05-23 Created: 2018-05-23 Last updated: 2024-01-08Bibliographically approved
Wang, P., Wang, J., Zhang, X., Wang, H., Cui, X., Yuan, S., . . . Zheng, L.-r. (2018). Boosting the performance of perovskite solar cells through a novel active passivation method. Journal of Materials Chemistry A, 6(32), 15853-15858
Open this publication in new window or tab >>Boosting the performance of perovskite solar cells through a novel active passivation method
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2018 (English)In: Journal of Materials Chemistry A, ISSN 2050-7488, Vol. 6, no 32, p. 15853-15858Article in journal (Refereed) Published
Abstract [en]

Potassium halides have recently garnered much attention, due to their improvement of perovskite solar cell performance. A small amount of potassium halide incorporated in a perovskite absorber is able to provide advantages in terms of crystallinity, light absorption and trap state reduction. Here, we present a potassium chloride (KCl) pretreatment process to fabricate high-efficiency perovskite solar cells (PSCs). A KCl layer was inserted at the SnO2/MAPbI(3-x)Cl(x) interface via a simple spin coating method. It is observed that potassium cations (K+) and chloride anions (Cl-) diffused into the perovskite film during the thermal annealing process. The diffusion of K+ and Cl- will stop when they reach a bulk defect, resulting in an active passivation effect. It is verified that the incorporation of KCl enhances the crystal perfection and light absorption of the perovskite film. The average power conversion efficiency (PCE) of PSCs increases from 16.62% to 17.81%, with a leading PCE of 19.44%.

Place, publisher, year, edition, pages
Royal Society of Chemistry, 2018
National Category
Condensed Matter Physics
Identifiers
urn:nbn:se:kth:diva-234592 (URN)10.1039/c8ta05593a (DOI)000442385800043 ()2-s2.0-85051722126 (Scopus ID)
Note

QC 20180914

Available from: 2018-09-14 Created: 2018-09-14 Last updated: 2024-01-08Bibliographically approved
Yuan, S., Wang, J., Yang, K., Wang, P., Zhang, X., Zhan, Y. & Zheng, L.-r. (2018). High efficiency MAPbI(3-x)Cl(x) perovskite solar cell via interfacial passivation. Nanoscale, 10(40), 18909-18914
Open this publication in new window or tab >>High efficiency MAPbI(3-x)Cl(x) perovskite solar cell via interfacial passivation
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2018 (English)In: Nanoscale, ISSN 2040-3364, E-ISSN 2040-3372, Vol. 10, no 40, p. 18909-18914Article in journal (Refereed) Published
Abstract [en]

The trap states at the interface between perovskite and charge-transport layer have a great influence on the performance of perovskite solar cells. Here, a high efficiency MAPbI(3-x)Cl(x) perovskite solar cell has been demonstrated, by introducing a thin layer of LiF or PbF2 between the SnO2/perovskite. Improved charge collection and reduced interfacial charge recombination are realized, leading to remarkable rises of both open-circuit voltage (V-oc) and short-circuit current (J(sc)). This successful interfacial passivation paved a new way to fabricate high performance perovskite solar cells with large V-oc.

Place, publisher, year, edition, pages
Royal Society of Chemistry, 2018
National Category
Physical Sciences
Identifiers
urn:nbn:se:kth:diva-239090 (URN)10.1039/c8nr05504a (DOI)000448344100001 ()30283942 (PubMedID)2-s2.0-85055074023 (Scopus ID)
Note

QC 20181121

Available from: 2018-11-21 Created: 2018-11-21 Last updated: 2024-01-08Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0001-9588-0239

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