Recent developments in medium-voltage (MV) silicon and silicon carbide (SiC) power semiconductor devices are challenging state-of-the-art converter and auxiliary power supply (APS) designs. The APS is an important converter component, which energizes the gate-drive units and, therefore, has an influence on the overall reliability and efficiency of the converter system. There has, however, been comparably little research on how the APS of high-power converter submodules can be realized, in particular, for high-voltage applications. New, or improved, solutions may build on state-of-the-art topologies in the near future, but utilize MV SiC technology in the APS circuit itself to enable improved efficiency, reliability, simplicity, and compactness. Externally-fed APS concepts could provide several further advantages. Their various benefits on converter and system level may enable them to be a competitive solution for future APS concepts. Especially, light-based power supply systems are considered most useful since they offer extreme voltage isolation capability and immunity to electromagnetic interference. This article presents a review of the wide range of solutions for APSs, possible implementation options, and the most important design considerations. The different solutions are evaluated in a qualitative fashion, providing an overview of available APS concepts with regard to the requirements for high-power converter applications.

WPs consist of a large variety of interconnected components including mechanical parts, power electronic devices, control and protection systems, etc. Accurate and generic models for different types of WTs are crucial for reliable design and planning of modern power systems that incorporate WPs. This chapter introduces an effective approach towards detailed modeling and simulation of WPs that employ variable speed WTs. Specifically, converters and their control schemes for DFIG and FSC WTs are thoroughly discussed, and their main parameters are explained. Moreover, software implementation, average value and detailed models, and controller design are addressed. EMTP® is used to verify the accuracy of the generic models under different test cases. Time-domain simulation results are analyzed and compared with the real-life measurements of post-fault transients in the test scenarios. The results confirm that the developed models in conjunction with the EMT simulations can accurately predict the response of DFIG and FSC WTs under both steady-state and transient conditions.

In this paper, proton implantation with different combinations of MeV energies and doses from 2×109 to 1×1011 cm-2 is used to create defects in the drift region of 10 kV 4H-SiC PiN diodes to obtain a localized drop in the SRH lifetime. On-state and reverse recovery behaviors are measured to observe how MeV proton implantation influences these devices and values of reverse recovery charge Qrr are extracted. These measurements are carried out under different temperatures, showing that the reverse recovery behavior is sensitive to temperature due to the activation of incompletely ionized p-type acceptors. The results also show that increasing proton implantation energies and fluencies can have a strong effect on diodes and cause lower Qrr and switching losses, but also higher on-state voltage drop and forward conduction losses. The trade-off between static and dynamic performance is evaluated using Qrr and forward voltage drop. Higher fluencies, or energies, help to improve the turn-off performance, but at a cost of the static performance. 

Recent advancements in the silicon carbide (SiC) power semiconductor technology offer improvements for high-power converters, where today silicon (Si) devices are still dominant. Bipolar SiC devices feature particularly good conduction capability while blocking high voltages. With expected advances in SiC material quality and processing technology, resulting in higher charge carrier lifetimes, methods for tailoring will be required. In this article, three differently optimized 10-kV SiC p-i-n diodes are compared regarding their switching and conduction performance in a 50-kHz LCC converter with a high output voltage. The converter topology features capacitively assisted switching, resulting in reduced switching losses for diodes with short reverse recovery tails. One diode group was subjected to a novel carrier lifetime tailoring method, involving simultaneous annihilation and generation of carbon vacancies. Another group was tailored via proton irradiation. Tradeoffs for the optimization of the diodes are highlighted. The analysis is supported by circuit simulations, device simulations, static measurements, switching waveform measurements, and calorimetric loss measurements. The results show a total rectifier loss reduction of 37%, compared to a state-of-the-art implementation with eight 1-kV Si diodes. The switching losses account for 3%-19% of the total losses, indicating a much higher possible operation frequency.

Recent advancements in silicon carbide (SiC) power semiconductor technology enable developments in the high-power sector, e.g., high-voltage-direct-current (HVdc) converters for transmission, where today silicon (Si) devices are state-of-the-art. New submodule (SM) topologies for modular multilevel converters offer benefits in combination with these new SiC semiconductors. This article reviews developments in both fields, SiC power semiconductor devices and SM topologies, and evaluates their combined performance in relation to core requirements for HVdc converters: grid code compliance, reliability, and cost. A detailed comparison of SM topologies regarding their structural properties, design and control complexity, voltage capability, losses, and fault handling is given. Alternatives to state-of-the-art SMs with Si insulated-gate bipolar transistors (IGBTs) are proposed, and several promising design approaches are discussed. Most advantages can be gained from three technology features. First, SM bipolar capability enables dc fault handling and reduced the energy storage requirements. Second, SM topologies with parallel conduction paths in combination with SiC metal-oxide-semiconductor field-effect transistors offer reduced losses. Third, a higher SM voltage enabled by a higher blocking voltage of SiC devices results in a reduced converter complexity. For the latter, ultrahigh-voltage bipolar devices, such as SiC IGBTs and SiC gate turn-off thyristors, are envisioned.

Recent developments in high-voltage (HV) silicon and silicon carbide (SiC) power semiconductor devices are challenging state-of-the-art converter and auxiliary power supply (APS) designs. There has been comparably little research on how the APS of converter submodules can be realized. The APS is, however, an important converter component, which energizes the gate-drive units and, therefore, has an influence on the overall reliability and efficiency of the converter system. The wide range of possible solutions for APSs motivates an overview of state-ofthe- art and alternative concepts. Such a review is presented in this article, along with a qualitative evaluation regarding APS requirements for high-power converter applications.

Moreover, future prospects of internal and external APS designs are discussed. Internal solutions may build on state-of-the-art topologies in the near future, but utilize HV SiC technology in the APS circuit itself to enable improved efficiency, reliability, simplicity, and compactness. The active voltage-divider-based APS is a promising concept if the required power is relatively low. Series-connected bootstrap circuits or snubber-based power tapping could provide a reduction of complexity and cost.

It is recognized that several advantages are achievable by employing external APS concepts. Light-based power supply systems, comparably expensive today but under rapid development and with optimistic cost predictions, are considered most useful in this respect. Their extreme voltage isolation capability and immunity to electromagnetic interference, combined with various benefits on converter and system level, enable them to be a competitive solution for future APS concepts

In order to transition to renewable energy sources and simultaneously meet the increasing demand for electrical energy, highly flexible and efficient grids are required. High-voltage direct-current (HVDC) transmission and grids are foreseen to be a vital part of the future electricity grid. Voltage source converters (VSCs), interfacing between HVDC and high-voltage alternating current (HVAC) technology, need to comply with grid code, and offer high reliability and cost efficiency. The state-of-the-art VSC topology is the modular multilevel converter (MMC), which offers tailored harmonic performance, modularity, fault handling, redundancy, and low losses.

This thesis investigates improvements for VSCs enabled by novel silicon carbide (SiC) power semiconductor devices. These devices feature lower losses, higher blocking voltage, and higher maximum operation temperature. However, a co-design of the different hardware levels (i.e., converter, submodule (SM), power device, and semiconductor) is required to unleash their full potential. The thesis features contributions on several of these hardware levels, aiming at improvements regarding defined technical requirements for VSCs.

It has been shown that, on converter level, future ultrahigh-voltage (UHV) SiC bipolar devices with blocking voltages of up to 50 kV have the potential for significant reduction of converter complexity, volume, and losses. The increased SM voltage is a challenge for internal fault handling, which can be met by a proposed novel SM feature, the discharge loop.

On SM level, additional improvements are enabled by synergies between power semiconductor device technology and SM topology. A comparative evaluation of a large variety of SM topologies in combination with different SiC power semiconductor device technologies identifies several promising design approaches for future SMs. An alternative to the state-of-the-art half-bridge and full-bridge SM is the semi-full-bridge, which is investigated intensively. It features lower switch count and lower losses compared to the full-bridge, while offering DC fault handling capability. Another topology, the double-connected double-zero SM, features additional conduction loss reduction in combination with SiC metal-oxide-semiconductor field-effect transistors (MOSFETs), which is enabled by parallel current paths during certain switching states. A SM cluster enhancing this effect is proposed.

Finally, results on the optimization of SiC PiN diodes via different charge carrier lifetime tailoring methods are presented. The target application is a high-voltage high-frequency LCC converter. In the future, such diodes will also be required as anti-parallel diodes for novel UHV bipolar SiC devices, as bootstrap diodes in gate drivers, and as a part of snubber circuits.

In this paper, power-over-fiber technology is used for combined power and data transfer applying amplitude-modulated light representing a pulse-width modulated signal that could be used for control of, for instance, power semiconductor devices in high-power converters. Even though the concept is generally applicable, an experimental verification aiming for a gate-driver of a switch in a modular multilevel converter is presented. In order to achieve a good resilience against electromagnetic noise, a concept where the modulated light is demodulated as a comparably powerful current signal is employed. A 5 MHz boost converter steps up the voltage to 15-20 V, such that silicon or silicon-carbide based power devices could be controlled. From the results, it can be concluded that it is possible to achieve transmission of a control signal with a latency of less than 500 ns for a gate drive unit of a high-power converter. The concept can easily be scaled up to powers of several watt.

In this paper, a technology computer-aided design (TCAD) model of a silicon carbide (SiC) insulated-gate bipolar transistor (IGBT) has been calibrated against previously reported experimental data. The calibrated TCAD model has been used to predict the static performance of theoretical SiC IGBTs with ultra-high blocking voltage capabilities in the range of 20-50 kV. The simulation results of transfer characteristics, IC-VGE, forward characteristics, IC-VCE, and blocking voltage characteristics are studied. The threshold voltage is approximately 5 V, and the forward voltage drop is ranging from VF = 4.2-10.0 V at IC = 20 A, using a charge carrier lifetime of τA = 20 μs. Furthermore, the forward voltage drop impact for different process dependent parameters (i.e., carrier lifetimes, mobility/scattering and trap related defects) and junction temperature are investigated in a parametric sensitivity analysis. The wide-range simulation results may be used as an input to facilitate high power converter design and evaluation. In this case, the TCAD simulated static characteristics of SiC IGBTs is compared to silicon (Si) IGBTs in a modular multilevel converter in a general highpower application. The results indicate several benefits and lower conduction energy losses using ultra-high voltage SiC IGBTs compared to Si IGBTs.

Future meshed high-voltage direct current grids require modular multilevel converters with extended functionality. One of the most interesting new submodule topologies is the semi-full-bridge because it enables efficient handling of DC-side short circuits while having reduced power losses compared to an implementation with full-bridge submodules. However, the semi-full-bridge submodule requires the parallel connection of capacitors during normal operation which can cause a high redistribution current in case the voltages of the two submodule capacitors are not equal. The maximum voltage difference and resulting redistribution current have been studied analytically, by means of simulations and in a full-scale standalone submodule laboratory setup. The most critical parameter is the capacitance mismatch between the two capacitors. The experimental results from the full-scale prototype show that the redistribution current peaks at 500A if the voltage difference is 10V before paralleling and increases to 2500A if the difference is 40V. However, neglecting very unlikely cases, the maximum voltage difference predicted by simulations is not higher than 20-30V for the considered case. Among other measures, a balancing controller is proposed which reduces the voltage difference safely if a certain maximum value is surpassed. The operating principle of the controller is described in detail and verified experimentally on a down-scaled submodule within a modular multilevel converter prototype. It can be concluded that excessively high redistribution currents can be prevented. Consequently, they are no obstacle for using the semi-full-bridge submodule in future HVDC converters.