This paper reports an industry standard monolithic 555-timer circuit designed and fabricated in the in-house silicon carbide (SiC) low-voltage bipolar technology. This paper demonstrates the 555-timer integrated circuits (ICs) characterization in both astable and monostable modes of operation, with a supply voltage of 15 V over the wide temperature range of 25 degrees C-500 degrees C. Nonmonotonic temperature dependence was observed for the 555-timer IC frequency, rise time, fall-time, and power dissipation.

This paper reports an industry standard monolithic 555-timer circuit designed and fabricated in the in-house silicon carbide (SiC) low-voltage bipolar technology. The paper demonstrates the 555-timer ICs characterization in both astable and monostable modes of operation, with a supply voltage of 15 V over the wide temperature range of 25 to 500°C. Nonmonotonictemperature dependence was observed for the 555-timer IC frequency, rise-time, fall-time, and power dissipation.

This letter presents the design, fabrication, and characterization of a 4H-SiC n-p-n bipolar junction transistor as a switch controlling an on-chip integrated p-i-n photodiode. The transistor and photodiode share the same epitaxial layers and topside contacts for each terminal. By connecting the collector of the transistor and the anode of the photodiode, the photo current from the photodiode is switched off at low base voltage (cutoff region of the transistor) and switched on at high base voltage (saturation region of the transistor). The transfer voltage of the circuit decreases as the ambient temperature increases (2 mV/degrees C). Both the on-state and off-state current of the circuit have a positive temperature coefficient and the on/off ratio is >80 at temperature ranged from 25 degrees C to 400 degrees C. It is proposed that the on/off ratio can be increased by similar to 1000 times by adding a light blocking layer on the transistor to reduce light induced off-state current in the circuit.

A Process Design Kit (PDK) has been developed to realize complex integrated circuits in Silicon Carbide (SiC) bipolar low-power technology. The PDK development process included basic device modeling, and design of gate library and parameterized cells. A transistor–transistor logic (TTL)-based PDK gate library design will also be discussed with delay, power, noise margin, and fan-out as main design criterion to tolerate the threshold voltage shift, beta (β) and collector current (I_C) variation of SiC devices as temperature increases. The PDK-based complex digital ICsdesign flow based on layout, physical verification, and in-house fabrication process will also be demonstrated. Both combinational and sequential circuits have been designed, such as a 720-device ALU and a 520-device 4 bit counter. All the integrated circuits and devices are fully characterized up to 500 °C. The inverter and a D-type flip-flop (DFF) are characterized as benchmark standard cells. The proposed work is a key step towards SiC-based very large-scale integrated (VLSI) circuits implementation for high-temperature applications.

Ring oscillators (ROs) are used to study the high-temperature characteristics of an in-house silicon carbide (SiC) technology. Design and successful operation of the in-house-fabricated 4H-SiC n-p-n bipolar transistors and TTL inverter-based 11-stage RO are reported from 25 degrees C to 600 degrees C. Non-monotonous temperature dependence was observed for the oscillator frequency; in the range of 25 degrees C to 300 degrees C, it increased with the temperature (1.33 MHz at 300 degrees C and V-CC = 15 V), while it decreased in the range of 300 degrees C-600 degrees C. The oscillator output frequency and delay were also characterized over a wide range of supply voltage (10 to 20 V). The noise margins of the TTL inverter were also measured; noise margin low (NML) decreases with the temperature, whereas noise margin high (NMH) increases with the temperature. The measured power-delay product (P-D . T-P) of the TTL inverter and 11-stage RO was approximate to 4.5 and approximate to 285 nJ, respectively, at V-CC= 15 V. Reliability testing indicated that the RO frequency of oscillation decreased 16% after HT characterization.

Most semiconductor devices require low-resistance ohmic contact to p-type doped regions. In this work, we present a semi-salicide process that forms low-resistance contacts (~10-4 Ω cm2) to epitaxially grown p-type (>5×1018 cm-3) 4H-SiC at temperatures as low as 600 °C using rapid thermal processing (RTP). The first step is to self-align the nickel silicide (Ni2Si) at 600 °C. The second step is to deposit aluminium on top of the silicide, pattern it and then perform a second annealing step in the range 500 °C to 700 °C.

4H-SiC p-i-n photodiodes with various mesa areas (40,000μm2, 2500μm2, 1600μm2, and 400μm2) have been fabricated. Both C-V and I-V characteristics of the photodiodes have been measured at room temperature, 200 °C, 400 °C, and 500 °C. The capacitance and photo current (at 365 nm) of the photodiodes are directly proportional to the area. However, the dark current density increases as the device is scaled down due to the perimeter surface recombination effect. The photo to dark current ratio at the full depletion voltage of the intrinsic layer (-2.7 V) of the photodiode at 500 °C decreases 7 times as the size of the photodiode scales down 100 times. The static and dynamic behavior of the photodiodes are modeled with SPICE parameters at the four temperatures.

An in-house fabricated 4H-SiC PIN diode that has both optical sensing and temperature sensing functions from room temperature (RT) to 550 ºC is presented. The two sensing functions can be simply converted from one to the other by switching the bias voltage on the diode. The optical responsivity of the diode at 365 nm is 31.8 mA/W at 550 ºC. The temperature sensitivity of the diode is 2.7 mV/ºC at the forward current of 1 μA.