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Soleimanifard, SiavashORCID iD iconorcid.org/0000-0002-7514-299x
Publications (7 of 7) Show all publications
Soleimanifard, S. & Gurov, D. (2016). Algorithmic verification of procedural programs in the presence of code variability. Science of Computer Programming, 127, 76-102
Open this publication in new window or tab >>Algorithmic verification of procedural programs in the presence of code variability
2016 (English)In: Science of Computer Programming, ISSN 0167-6423, E-ISSN 1872-7964, Vol. 127, p. 76-102Article in journal (Refereed) Published
Abstract [en]

We present a generic framework for verifying temporal safety properties of procedural programs that are dynamically or statically configured by replacing, adapting, or adding new components. To deal with such a variability of a program, we require programmers to provide local specifications for its variable components, and verify the global properties by replacing these specifications with maximal models. Our framework is a generalization of a previously developed framework that fully abstracts from program data. In this work, we recapture program data and thus significantly increase the range of properties that can be verified. Our framework is generic by being parametric on the set of observed program events and their semantics. We separate program structure from the behaviour it induces to facilitate independent component specification and verification. To exemplify the use of the framework, we develop three concrete instantiations; in particular, we derive a compositional verification technique for programs written in a procedural language with pointers as the only datatype.

Place, publisher, year, edition, pages
Elsevier, 2016
Keywords
Compositional verification, Model checking, Maximal models
National Category
Computer Systems
Identifiers
urn:nbn:se:kth:diva-190634 (URN)10.1016/j.scico.2015.08.010 (DOI)000379282600005 ()2-s2.0-84971665264 (Scopus ID)
Note

QC 20160819

Available from: 2016-08-19 Created: 2016-08-12 Last updated: 2022-06-22Bibliographically approved
Soleimanifard, S. & Gurov, D. (2015). Algorithmic verification of procedural programs in the presence of code variability. In: Formal Aspects of Component Software: 11th International Symposium, FACS 2014, Bertinoro, Italy, September 10-12, 2014, Revised Selected Papers. Paper presented at 11th International Symposium on Formal Aspects of Component Software, FACS 2014, Bertinoro, Italy, 10 September 2014 through 12 September 2014 (pp. 327-345). Springer, 8997
Open this publication in new window or tab >>Algorithmic verification of procedural programs in the presence of code variability
2015 (English)In: Formal Aspects of Component Software: 11th International Symposium, FACS 2014, Bertinoro, Italy, September 10-12, 2014, Revised Selected Papers, Springer, 2015, Vol. 8997, p. 41p. 327-345Conference paper, Published paper (Refereed)
Abstract [en]

We present a generic framework for verifying temporal safety properties of procedural programs that are dynamically or statically configured by replacing, adapting, or adding new components. To deal with such a variability of a program, we require programmers to provide local specifications for its variable components, and verify the global properties by replacing these specifications with maximal models. Our framework is a generalization of a previously developed framework that abstracts from all program data. In this work, we capture program data and thus significantly increase the range of properties that can be verified. Our framework is generic by being parametric on the set of observed program events and their semantics. We separate program structure from the behavior it induces to facilitate independent component specification and verification. We provide tool support for an instantiation of our framework to programs written in a procedural language with pointers as the only datatype.

Place, publisher, year, edition, pages
Springer, 2015. p. 41
Series
Lecture Notes in Computer Science, ISSN 0302-9743 ; 8997
Keywords
Algorithms, Computer software, Semantics, Algorithmic verification, Generic frameworks, Global properties, Independent components, New components, Procedural languages, Program structures, Temporal safety properties
National Category
Computer Sciences
Identifiers
urn:nbn:se:kth:diva-128950 (URN)10.1007/978-3-319-15317-9_20 (DOI)2-s2.0-84922326750 (Scopus ID)978-3-319-15316-2 (ISBN)978-3-319-15317-9 (ISBN)
Conference
11th International Symposium on Formal Aspects of Component Software, FACS 2014, Bertinoro, Italy, 10 September 2014 through 12 September 2014
Note

QC 20150504. Updated from manuscript to conference paper.

Available from: 2013-09-17 Created: 2013-09-17 Last updated: 2024-03-18Bibliographically approved
Soleimanifard, S., Gurov, D. & Huisman, M. (2013). Procedure-Modular Specification and Verification of Temporal Safety Properties. Software & Systems Modeling
Open this publication in new window or tab >>Procedure-Modular Specification and Verification of Temporal Safety Properties
2013 (English)In: Software & Systems Modeling, ISSN 1619-1366Article in journal (Refereed) Published
Abstract [en]

This paper describes ProMoVer, a tool for fully automated procedure-modular verification of Java programs equipped with method-local and global assertions that specify safety properties of sequences of method invocations. Modularity at the procedure-level is a natural instantiation of the modular verification paradigm, where correctness of global properties is relativized on the local properties of the methods rather than on their implementations. Here, it is based on the construction of maximal models for a program model that abstracts away from program data. This approach allows global properties to be verified in the presence of code evolution, multiple method implementations (as arising from software product lines), or even unknown method implementations (as in mobile code for open platforms). ProMoVer automates a typical verification scenario for a previously developed tool set for compositional verification of control flow safety properties, and provides appropriate pre- and post-processing. Both linear-time temporal logic and finite automata are supported as formalisms for expressing local and global safety properties, allowing the user to choose a suitable format for the property at hand. Modularity is exploited by a mechanism for proof reuse that detects and minimizes the verification tasks resulting from changes in the code and the specifications. The verification task is relatively light-weight due to support for abstraction from private methods and automatic extraction of candidate specifications from method implementations. We evaluate the tool on a number of applications from the domains of Java Card and web-based application.

Place, publisher, year, edition, pages
Springer, 2013
Keywords
Temporal logic, Model checking, Maximal models
National Category
Computer Sciences
Identifiers
urn:nbn:se:kth:diva-129204 (URN)10.1007/s10270-013-0321-0 (DOI)000349026100007 ()2-s2.0-84922337820 (Scopus ID)
Funder
Swedish Research Council
Note

QC 20130926

Available from: 2013-09-23 Created: 2013-09-23 Last updated: 2024-03-18Bibliographically approved
Soleimanifard, S., Gurov, D. & Huisman, M. (2011). ProMoVer: Modular Verification of Temporal Safety Properties. In: Software Engineering and Formal Methods (SEFM) 2011: . Paper presented at 9th International Conference, SEFM 2011, Montevideo, Uruguay, November 14-18, 2011 (pp. 366-381). Springer
Open this publication in new window or tab >>ProMoVer: Modular Verification of Temporal Safety Properties
2011 (English)In: Software Engineering and Formal Methods (SEFM) 2011, Springer , 2011, p. 366-381Conference paper, Published paper (Refereed)
Abstract [en]

This paper describes ProMoVer, a tool for fully automated procedure–modular verification of Java programs equipped with method–local and global assertions that specify safety properties of sequences of method invocations. Modularity at the procedure–level is a natural instantiation of the modular verification paradigm, where correctness ofglobal properties is relativized on the local properties of the methods rather than on their implementations, and is based here on the construction of maximal models for a program model that abstracts away from program data. This approach allows global properties to be verified in the presence of code evolution, multiple method implementations (as arising from software product lines), or even unknown method implementations (as in mobile code for open platforms). ProMoVer automates a typical verification scenario for a previously developed tool set for compositionalverification of control flow safety properties, and provides appropriatepre– and post–processing. Modularity is exploited by a mechanism for proof reuse that detects and minimizes the verfication tasks resulting from changes in the code and the specifications. The verification task is relatively light–weight due to support for abstraction from private methods and automatic extraction of candidate specifications from methodimplementations. We evaluate the tool on a number of applications from the smart card domain.

Place, publisher, year, edition, pages
Springer, 2011
Series
Lecture notes in computer science, ISSN 0302-9743 ; 7041
National Category
Computer Sciences
Identifiers
urn:nbn:se:kth:diva-49416 (URN)10.1007/978-3-642-24690-6_25 (DOI)000305321300025 ()2-s2.0-81055124334 (Scopus ID)978-3-642-24689-0 (ISBN)
Conference
9th International Conference, SEFM 2011, Montevideo, Uruguay, November 14-18, 2011
Note

QC 20220308

Available from: 2012-01-11 Created: 2011-11-27 Last updated: 2022-06-24Bibliographically approved
Schaefer, I., Gurov, D. & Soleimanifard, S. (2010). Compositional Algorithmic Verification of Software Product Lines. In: : . Paper presented at 9th International Symposium on Formal Methods for Components and Objects, FMCO 2010; Graz; Austria; 29 November-1 December 2010 (pp. 184-203). Springer
Open this publication in new window or tab >>Compositional Algorithmic Verification of Software Product Lines
2010 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Software product line engineering allows large software systems to be developed and adapted for varying customer needs. The products of a software product line can be described by means of a {\em hierarchical variability model} specifying the commonalities and variabilities between the artifacts of the individual products. The number of products generated by a hierarchical model is exponential in its size, which poses a serious challenge to software product line analysis and verification. For an analysis technique to scale, the effort has to be linear in the size of the model rather than linear in the number of products it generates. Hence, efficient product line verification is only possible if {\em compositional} verification techniques are applied that allow the analysis of products to be {\em relativized}  on the properties of their variation points. In this paper, we propose simple hierarchical variability models (SHVM) with explicit variation points as a novel way to describe a set of products consisting of sets of methods. SHVMs provide a trade--off between expressiveness and a clean and simple model suitable for compositional verification. We generalize a previously developed  compositional technique and tool set for the automatic verification of control--flow based temporal safety properties to product lines defined by SHVMs, and prove soundness of the generalization. The desired property relativization is achieved by introducing variation point specifications. We evaluate the proposed technique on a number of test cases.

Place, publisher, year, edition, pages
Springer, 2010
Series
Lecture notes in computer science, ISSN 0302-9743 ; 6957
Keywords
Distributed systems, event-B, fault injection, model checking, software verification
National Category
Computer Sciences
Identifiers
urn:nbn:se:kth:diva-49419 (URN)10.1007/978-3-642-25271-6_10 (DOI)2-s2.0-84255161819 (Scopus ID)978-3-642-25270-9 (ISBN)
Conference
9th International Symposium on Formal Methods for Components and Objects, FMCO 2010; Graz; Austria; 29 November-1 December 2010
Note

QC 20140915

Available from: 2012-01-09 Created: 2011-11-27 Last updated: 2024-03-18Bibliographically approved
Berg, T., Jonsson, B. & Soleimanifard, S. (2010). Inferring Compact Models of Communication Protocol Entities. In: Margaria, Tiziana; Steffen, Bernhard (Ed.), Leveraging Applications of Formal Methods, Verification, and Validation: Part I. Paper presented at 4th International Symposium on Leveraging Applications of Formal Methods, Verification and Validation Heraklion, GREECE, OCT 18-21, 2010 (pp. 658-672). Springer
Open this publication in new window or tab >>Inferring Compact Models of Communication Protocol Entities
2010 (English)In: Leveraging Applications of Formal Methods, Verification, and Validation: Part I / [ed] Margaria, Tiziana; Steffen, Bernhard, Springer, 2010, p. 658-672Conference paper, Published paper (Refereed)
Abstract [en]

Our overall goal is to support model-based approaches to verification and validation of communication protocols by techniques that automatically generate models of communication protocol entities from observations of their external behavior, using techniques based on regular inference (aka automata learning). In this paper, we address the problem that existing regular inference techniques produce "flat" state machines, whereas practically useful protocol models structure the internal state in terms of control locations and state variables, and describes dynamic behavior in a suitable (abstract) programming notation. We present a technique for introducing structure of an unstructured finite-state machine by introducing state variables and program-like descriptions of dynamic behavior, given a certain amount of user guidance. Our technique groups states with "similar control behavior" into control locations, and obtain program-like descriptions by means of decision tree generation. We have applied parts of our approach to an executable state machine specification of the Mobile Arts Advanced Mobile Location Center (A-MLC) protocol and evaluated the results by comparing them to the original specification.

Place, publisher, year, edition, pages
Springer, 2010
Series
Lecture Notes in Computer Science, ISSN 0302-9743 ; 6415
Keywords
STATE MACHINES; REGULAR INFERENCE; VERIFICATION; INTEGRATION; COMPONENTS
National Category
Computer Sciences
Identifiers
urn:nbn:se:kth:diva-49443 (URN)10.1007/978-3-642-16558-0_53 (DOI)000289493100053 ()2-s2.0-78650291305 (Scopus ID)978-3-642-16557-3 (ISBN)
Conference
4th International Symposium on Leveraging Applications of Formal Methods, Verification and Validation Heraklion, GREECE, OCT 18-21, 2010
Note
QC 20111216Available from: 2011-12-16 Created: 2011-11-27 Last updated: 2024-03-18Bibliographically approved
Soleimanifard, S., Gurov, D. & Huisman, M. (2010). Procedure-Modular Verification of Control Flow Safety Properties. In: Proceedings of the 12th Workshop on Formal Techniques for Java-Like Programs. Paper presented at 12th Workshop on Formal Techniques for Java-like Programs, June 22, Maribor (Slovenia.
Open this publication in new window or tab >>Procedure-Modular Verification of Control Flow Safety Properties
2010 (English)In: Proceedings of the 12th Workshop on Formal Techniques for Java-Like Programs, 2010Conference paper, Published paper (Refereed)
Abstract [en]

This paper describes a novel technique for fully automated procedure–modular verification of Java programs equipped with method–local and global assertions that specify safety properties of sequences of method invocations. Modularity of verification is achieved by relativizing the correctness of global properties on the local properties rather than on the implementations of methods, and is based on the construction of maximal models. Tool support is provided by means of ProMoVer, a tool that is essentially a wrapper around a previously developed tool set for compositional verification of control flow safety properties, where program data is abstracted a way completely. We evaluate the technique on a small but realistic case study.

Keywords
Maximal models, Modular verification, Temporal logic
National Category
Computer and Information Sciences
Identifiers
urn:nbn:se:kth:diva-38455 (URN)10.1145/1924520.1924525 (DOI)2-s2.0-79957970909 (Scopus ID)978-1-4503-0540-2 (ISBN)
Conference
12th Workshop on Formal Techniques for Java-like Programs, June 22, Maribor (Slovenia
Note
QC 20110826Available from: 2011-08-26 Created: 2011-08-25 Last updated: 2024-03-18Bibliographically approved
Organisations
Identifiers
ORCID iD: ORCID iD iconorcid.org/0000-0002-7514-299x

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