Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Horizontal Slot Waveguides for Silicon Photonics Back-End Integration
KTH, School of Information and Communication Technology (ICT), Integrated Devices and Circuits.
2014 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

This thesis presents the development of integrated silicon photonic devices. These devices are compatible with the present and near future CMOS technology. High-khorizontal grating couplers and waveguides are proposed. This work consists of simulations and device design, as well as the layout for the fabrication process, device fabrication, process development, characterization instrument development and electro-optical characterizations.

The work demonstrates an alternative solution to costly silicon-on-insulator photonics. The proposed solution uses bulk silicon wafers and thin film deposited waveguides. Back-end deposited horizontal slot grating couplers and waveguides are realized by multi-layers of amorphous silicon and high-k materials.

The achievements of this work include: A theoretical study of fully etched slot grating couplers with Al2O3, HfO2 and AIN, an optical study of the high-k films with spectroscopic ellipsometry, an experimental demonstration of fully etched SiO2 single slot grating couplers and double slot Al2O3 grating couplers, a practical demonstration of horizontal double slot high-k waveguides, partially etched Al2O3 single slot grating couplers, a study of a scheme for integration of the double slot Al2O3  waveguides with selectively grown germanium PIN photodetectors, realization of test chips for the integrated germanium photodetectors, and study of integration with graphene photodetectors through embedding the graphene into a high-k slot layer.

From an application point of view, these high-k slot waveguides add more functionality to the current silicon photonics. The presented devices can be used for low cost photonics applications. Also alternative optical materials can be used in the context of this photonics platform.

With the robust design, the grating couplers result in improved yield and a more cost effective solution is realized for integration of the waveguides with the germanium and graphene photodetectors.

 

 

 

 

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2014. , xiii, 90 p.
Series
TRITA-ICT/MAP AVH, ISSN 1653-7610 ; 2014:17
Keyword [en]
silicon photonics, slot waveguides, grating couplers, CMOS tech- nology, high-k, ALD, germanium photodetectors, graphene photodetectors, pho- tonic integrated circuits
National Category
Nano Technology Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-155732ISBN: 978-91-7595-340-3 (print)OAI: oai:DiVA.org:kth-155732DiVA: diva2:762425
Public defence
2014-12-05, Sal/hall A, Electrum, KTH-ICT, Kista, 10:00 (English)
Opponent
Supervisors
Note

QC 20141114

Available from: 2014-11-14 Created: 2014-11-11 Last updated: 2016-12-01Bibliographically approved
List of papers
1. Fully etched grating couplers for atomic layer deposited horizontal slot waveguides
Open this publication in new window or tab >>Fully etched grating couplers for atomic layer deposited horizontal slot waveguides
2011 (English)In: 2011 12th International Conference on Ultimate Integration on Silicon, ULIS 2011, 2011, 126-129 p.Conference paper, Published paper (Refereed)
Abstract [en]

Compact broadband grating couplers are designed and studied utilizing Atomic Layer Deposited Horizontal Slot waveguides, with four well-known material layers as the slot. Fabrication process conditions are experimentally studied to obtain more optimized designs. With the precision of the film thickness and refractive index provided by ALD, fabrication of reproducible grating couplers is feasible. An overview of design guidelines regarding the slot size and slot material is provided by 2D Finite Element Method calculations.

Keyword
atomic layer deposition, finite element analysis, waveguide couplers, 2D finite element method calculations, ALD, atomic layer deposited horizontal slot waveguides, compact broadband grating couplers, fabrication process, fully etched grating couplers, slot material
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-61147 (URN)10.1109/ULIS.2011.5758007 (DOI)2-s2.0-79957991210 (Scopus ID)978-145770090-3 (ISBN)
Conference
2011 12th International Conference on Ultimate Integration on Silicon, ULIS 2011; Cork; 14 March 2011 through 16 March 2011
Funder
EU, European Research Council
Note
QC 20120124Available from: 2012-01-16 Created: 2012-01-16 Last updated: 2014-11-14Bibliographically approved
2. Low loss high-k slot waveguides for silicon photonics
Open this publication in new window or tab >>Low loss high-k slot waveguides for silicon photonics
2013 (English)In: Dev. Res. Conf. Conf. Dig., IEEE conference proceedings, 2013, 95-96 p.Conference paper, Published paper (Refereed)
Abstract [en]

Silicon photonic integrated circuits are promising solutions for high speed on-chip data communication. Producing crystalline silicon optical waveguides at the backend of the IC process flow requires wafer-bonding and a deep substrate etching of an SOI wafer. Fabrication of optical interconnects is less complex and more cost effective if deposited amorphous silicon can be used instead. Amorphous silicon on the other hand suffers from a high absorption. Slot waveguide is a suitable solution for integration of alternative materials with silicon waveguides. Active devices with slot waveguides have been reported by Ramirez et al where the slot layer is doped with rare-earth metals to generate light. In this work successful fabrication and characterization of CMOS compatible low loss high-k amorphous silicon slot waveguides is reported.

Place, publisher, year, edition, pages
IEEE conference proceedings, 2013
Series
Device Research Conference - Conference Digest, DRC, ISSN 1548-3770
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-139418 (URN)10.1109/DRC.2013.6633810 (DOI)000347466000053 ()2-s2.0-84890024161 (Scopus ID)9781479908110 (ISBN)
Conference
71st Device Research Conference, DRC 2013, 23 June 2013 through 26 June 2013, Notre Dame, IN
Note

QC 20140116

Available from: 2014-01-16 Created: 2014-01-13 Last updated: 2015-12-03Bibliographically approved
3. CMOS compatible ALD high-k double slot grating couplers for on-chip optical interconnects
Open this publication in new window or tab >>CMOS compatible ALD high-k double slot grating couplers for on-chip optical interconnects
2012 (English)In: Solid-State Device Research Conference (ESSDERC), 2012 Proceedings of the European, IEEE , 2012, 93-96 p.Conference paper, Published paper (Refereed)
Abstract [en]

Silicon-on-insulator(SOI) novel on-chip grating couplers for double slot high-k waveguides are experimentally demonstrated. The devices were fabricated with standard CMOS process technology. The grating couplers were designed for the best performance at the C-band communication range. Two thin layers of aluminum oxide formed the slot region of the waveguide. The high-k layers were deposited using the atomic layer deposition (ALD) method. A reliable process was realized by etching the structures to the buried oxide. Effect of the top oxide cladding layer on the efficiency was studied. The grating couplers had a measured efficiency of 22% at 1.55μm wavelength. This efficiency is competitive to other results reported by other groups.

Place, publisher, year, edition, pages
IEEE, 2012
Series
European Solid-State Device Research Conference, ISSN 1930-8876
Keyword
Aluminum oxides, Buried oxides, Cladding layer, CMOS Compatible, Communication range, Grating couplers, On chips, On-chip optical interconnects, Silicon-on-insulators, Standard CMOS process, Thin layers
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-111803 (URN)10.1109/ESSDERC.2012.6343341 (DOI)2-s2.0-84870591044 (Scopus ID)978-146731707-8 (ISBN)
Conference
42nd European Solid-State Device Research Conference, ESSDERC 2012, 17 September 2012 through 21 September 2012, Bordeaux
Funder
StandUp
Note

QC 20130114

Available from: 2013-01-14 Created: 2013-01-14 Last updated: 2014-11-14Bibliographically approved
4. ALD high-k layer grating couplers for single and double slot on-chip SOI photonics
Open this publication in new window or tab >>ALD high-k layer grating couplers for single and double slot on-chip SOI photonics
2012 (English)In: Solid-State Electronics, ISSN 0038-1101, E-ISSN 1879-2405, Vol. 74, 58-63 p.Article in journal (Refereed) Published
Abstract [en]

State of the art grating couplers for horizontal single and double slot waveguides are presented; in these devices the input signal is transmitted from a single mode optical fiber to silicon on insulator slot waveguide. In the waveguides, atomic layer deposited (ALD) high-k dielectrics form the low refractive index slot. It is demonstrated that a fully etched design combined with precision of ALD result in highly reproducible devices with theoretical efficiency variations less than 1%. Devices have a peak calculated coupling efficiency of 24% at 1.55 mu m. In order to achieve an optimal design, optical properties of high-k films are studied by spectroscopic ellipsometry. Measured refractive indices show variations from reference values, originated from film variation in densities. Chips with a test slot material are fabricated and the optical efficiency of the couplers is characterized. The maximum measured coupling efficiency of the couplers is 18.5%.

Keyword
Integrated photonics, Grating couplers, High-k thin films, Slot waveguides, Fabrication and characterization
National Category
Physical Sciences
Identifiers
urn:nbn:se:kth:diva-99216 (URN)10.1016/j.sse.2012.04.012 (DOI)000305728600011 ()2-s2.0-84861899154 (Scopus ID)
Funder
StandUp
Note

QC 20120727

Available from: 2012-07-27 Created: 2012-07-23 Last updated: 2017-12-07Bibliographically approved
5. Integrating 3D PIN germanium detectors with high-k ALD fabricated slot waveguides
Open this publication in new window or tab >>Integrating 3D PIN germanium detectors with high-k ALD fabricated slot waveguides
2014 (English)In: ULIS 2014 - 2014 15th International Conference on Ultimate Integration on Silicon, IEEE Computer Society, 2014, 45-48 p.Conference paper, Published paper (Refereed)
Abstract [en]

A novel device technology for photonics integrated circuits (PICs) is presented. In this work germanium PIN photodetectors are embedded in back-end deposited high-k slot waveguides. The waveguides are fabricated using chemical vapor deposited amorphous silicon and atomic layer deposition of Al 2O3 thin films. The germanium PIN stack is selectively grown on a bulk silicon substrate. The detectors are butt coupled to the slot waveguides. Using our selective germanium growth and interconnect technology we study a 3D multilayer photonic integration for CMOS back-end of the line (BEOL) process. Finally we demonstrate the fabrication of a photonic chip deploying this technology platform.

Place, publisher, year, edition, pages
IEEE Computer Society, 2014
Keyword
CMOS technology, germanium photodetectors, optical interconnects, photonics integrated circuits(PIC), silicon photonics, slot waveguides
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-146703 (URN)10.1109/ULIS.2014.6813902 (DOI)000341731300012 ()2-s2.0-84901355177 (Scopus ID)
Conference
2014 15th International Conference on Ultimate Integration on Silicon, ULIS 2014; Stockholm; Sweden; 7 April 2014 through 9 April 2014
Note

QC 20140613

Available from: 2014-06-13 Created: 2014-06-13 Last updated: 2014-11-14Bibliographically approved

Open Access in DiVA

Thesis(7905 kB)1704 downloads
File information
File name FULLTEXT01.pdfFile size 7905 kBChecksum SHA-512
56c533adf2e15f0e2d773517639a82282118290386448c1ef1577a940c9a3877c2467f3a7ee6825b4810ca6bbaa9a993c216973538ecae6f345c797b85af0173
Type fulltextMimetype application/pdf

Search in DiVA

By author/editor
A. M. Naiini, Maziar
By organisation
Integrated Devices and Circuits
Nano TechnologyOther Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar
Total: 1704 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

isbn
urn-nbn

Altmetric score

isbn
urn-nbn
Total: 4119 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • harvard1
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf