In this paper, we present a system level designmethodology which allows designers to model andanalyze their systems from the early stages of thedesign process until nal implementation. The de-sign methodology targets heterogeneous embeddedsystems and is based on a formal modeling frame-work, called ForSyDe. ForSyDe is available underthe open Source approach, which allows small andmedium enterprises (SME) to get easy access toadvanced modeling capabilities and tools. We givean introduction to the design methodology throughthe system level modeling of a simple industrial usecase, and we outline the basics of the underlyingForSyDe model.