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Fabrication of 2700-v 12-m Omega center dot cm(2) non ion-implanted 4H-SiC BJTs with common-emitter current gain of 50
KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
KTH, Skolan för informations- och kommunikationsteknik (ICT), Integrerade komponenter och kretsar.
Vise andre og tillknytning
2008 (engelsk)Inngår i: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 29, nr 10, s. 1135-1137Artikkel i tidsskrift (Fagfellevurdert) Published
Abstract [en]

High-voltage blocking (2.7-kV) implantation-free SiC bipolar junction transistors with low ON-state resistance (12 m Omega . cm(2)) and high common-emitter current gain of 50 have been fabricated. A graded-base doping was implemented to provide a low-resistive ohmic contact to the epitaxial base. This design features a fully depleted base layer close to the breakdown voltage providing an efficient epitaxial JTE without ion implantation. Eliminating all ion implantation steps in this approach is beneficial for avoiding high-temperature dopant activation annealing and for avoiding generation of lifetime-killing defects that reduce the current gain.

sted, utgiver, år, opplag, sider
2008. Vol. 29, nr 10, s. 1135-1137
Emneord [en]
bipolar junction transistors (BJTs), power transistors, silicon carbide, bipolar junction transistors, layer
Identifikatorer
URN: urn:nbn:se:kth:diva-17872DOI: 10.1109/led.2008.2004419ISI: 000259812900016Scopus ID: 2-s2.0-54849362500OAI: oai:DiVA.org:kth-17872DiVA, id: diva2:335917
Merknad
QC 20100525Tilgjengelig fra: 2010-08-05 Laget: 2010-08-05 Sist oppdatert: 2017-12-12bibliografisk kontrollert
Inngår i avhandling
1. Fabrication Technology for Efficient High Power Silicon Carbide Bipolar Junction Transistors
Åpne denne publikasjonen i ny fane eller vindu >>Fabrication Technology for Efficient High Power Silicon Carbide Bipolar Junction Transistors
2011 (engelsk)Doktoravhandling, med artikler (Annet vitenskapelig)
Abstract [en]

The superior characteristics of Silicon Carbide as a wide band gap semiconductor have motivated many industrial and non-industrial research groups to consider SiC for the next generations of high power semiconductor devices. The SiC Bipolar Junction Transistor (BJT) is one candidate for high power applications due to its low on-state power loss and fast switching capability. However, to compete with other switching devices such as Field Effect Transistors (FETs) or IGBTs, it is necessary for a power SiC BJT to provide a high current gain to reduce the power required from the drive circuit. In this thesis implantation free 4H-SiC BJTs with linearly graded base layer have been demonstrated with common-emitter current gain of 50 and open-base breakdown voltage of 2700 V. Also an efficient junction termination extension (JTE) with 80% of theoretical parallel-plane breakdown voltage was analyzed by fabrication of high voltage PiN diodes to achieve an optimum dose of remaining JTE charge. Surface passivation of 4H-SiC BJT is an essential factor for efficient power BJTs. Therefore different passivation techniques were compared and showed that around 60% higher maximum current gain can be achieved by a newsurface passivation layer with low interface trap density that consists of PECVD oxide followed by post-deposition oxide anneal in N2O ambient. This surface passivation along with doublezone JTE were used for fabrication of high power BJTs that result in successful demonstration of 2800 V breakdown voltage for small area (0.3 × 0.3 mm) and large area (1.8 × 1.8 mm) BJTs with a maximum dc current gain of 55 and 52, respectively. The small area BJT showed RON = 4mΩcm2, while for the large are BJT RON = 6.8 mΩcm2. Finally, a Darlington transistor with a maximum current gain of 2900 at room temperature and 640 at 200 °C is reported. The high current gain of the Darlington transistor is achieved by optimum design for the ratio of the active area of the driver BJT to the output BJT.

sted, utgiver, år, opplag, sider
Stockholm: KTH Royal Institute of Technology, 2011. s. xv, 79
Serie
Trita-ICT/MAP AVH, ISSN 1653-7610 ; 2011:01
HSV kategori
Identifikatorer
urn:nbn:se:kth:diva-29726 (URN)978-91-7415-861-8 (ISBN)
Disputas
2011-03-04, Sal C1, KTH-Electrum, Isafjordsgatan 22, Kista, 10:00 (engelsk)
Opponent
Veileder
Merknad
QC 20110216Tilgjengelig fra: 2011-02-16 Laget: 2011-02-14 Sist oppdatert: 2011-02-16bibliografisk kontrollert

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