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Towards HPC-embedded. Case study: Kalray and message-passing on NoC
KTH, School of Computer Science and Communication (CSC), Computational Science and Technology (CST). Basque Center for Applied Mathematics (BCAM), Spain.
2017 (English)In: Scalable Computing: Practice and Experience, ISSN 1895-1767, E-ISSN 1895-1767, Vol. 18, no 2, p. 151-160Article in journal (Refereed) Published
Abstract [en]

Today one of the most important challenges in HPC is the development of computers with a low power consumption. In this context, recently, new embedded many-core systems have emerged. One of them is Kalray. Unlike other many-core architectures, Kalray is not a co-processor (self-hosted). One interesting feature of the Kalray architecture is the Network on Chip (NoC) connection. Habitually, the communication in many-core architectures is carried out via shared memory. However, in Kalray, the communication among processing elements can also be via Message-Passing on the NoC. One of the main motivations of this work is to present the main constraints to deal with the Kalray architecture. In particular, we focused on memory management and communication. We assess the use of NoC and shared memory on Kalray. Unlike shared memory, the implementation of Message-Passing on NoC is not transparent from programmer point of view. The synchronization among processing elements and NoC is other of the challenges to deal with in the Karlay processor. Although the synchronization using Message-Passing is more complex and consuming time than using shared memory, we obtain an overall speedup close to 6 when using Message-Passing on NoC with respect to the use of shared memory. Additionally, we have measured the power consumption of both approaches. Despite of being faster, the use of NoC presents a higher power consumption with respect to the approach that exploits shared memory. This additional consumption in Watts is about a 50%. However, the reduction in time by using NoC has an important impact on the overall power consumption as well.

Place, publisher, year, edition, pages
Editura Universitatii de Vest din Timisoara / University of the West Timisoara Publishing House, 2017. Vol. 18, no 2, p. 151-160
Keywords [en]
Embedded architectures, High Performance Computing, Jacobi method, Karlay, OpenMP, Power measurements
National Category
Computer Engineering
Identifiers
URN: urn:nbn:se:kth:diva-210617DOI: 10.12694/scpe.v18i2.1287ISI: 000406361000006Scopus ID: 2-s2.0-85020868689OAI: oai:DiVA.org:kth-210617DiVA, id: diva2:1118895
Note

QC 20170703

Available from: 2017-07-03 Created: 2017-07-03 Last updated: 2024-03-18Bibliographically approved

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Jansson, Johan

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