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Electrical characterization of integrated 2-input TTL NAND Gate at elevated temperature, fabricated in bipolar SiC-technology
KTH, School of Electrical Engineering and Computer Science (EECS), Electronics, Integrated devices and circuits.
KTH.
KTH.
KTH, School of Electrical Engineering and Computer Science (EECS), Electronics, Integrated devices and circuits.ORCID iD: 0000-0001-8108-2631
2018 (English)In: International Conference on Silicon Carbide and Related Materials, ICSCRM 2017, Trans Tech Publications Inc., 2018, Vol. 924, p. 958-961Conference paper, Published paper (Refereed)
Abstract [en]

This work presents the design and electrical characterization of in-house-fabricated 2-input NAND gate. The monolithic bipolar 2-input NAND gate employing transistor-transistor logic (TTL) is demonstrated in 4H-SiC and operates over a wide range of temperature and supply voltage. The fabricated circuit was characterized on the wafer by using a hot-chuck probe-station from 25 °C up to 500 °C. The circuit is also characterized over a wide range of voltage supply i.e. 11 to 20 V. The output-noise margin high (NMH) and output-noise margin low (NML) are also measured over a wide range of temperatures and supply voltages using voltage transfer characteristics (VTC). The transient response was measured by applying two square waves of, 5 kHz and 10 kHz. It is demonstrated that the dynamic parameters of the circuit are temperature dependent. The 2-input TTL NAND gate consumes 20 mW at 500 °C and 15 V.

Place, publisher, year, edition, pages
Trans Tech Publications Inc., 2018. Vol. 924, p. 958-961
Series
Materials Science Forum, ISSN 0255-5476 ; 924
Keywords [en]
Bipolar junction transistor (BJT), Bipolar SiC NAND gate, Digital gate, High temperature integrated circuits (ICs), SiC ICs, Transistor-transistor logic (TTL), TTL NAND gate
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-238378DOI: 10.4028/www.scientific.net/MSF.924.958Scopus ID: 2-s2.0-85049001714ISBN: 9783035711455 OAI: oai:DiVA.org:kth-238378DiVA, id: diva2:1260106
Conference
International Conference on Silicon Carbide and Related Materials, ICSCRM 2017, Columbia, United States, 17 September 2017 through 22 September 2017
Note

QC 20181101

Available from: 2018-11-01 Created: 2018-11-01 Last updated: 2019-05-23Bibliographically approved
In thesis
1. Process Design Kit and High-Temperature Digital ASICs in Silicon Carbide
Open this publication in new window or tab >>Process Design Kit and High-Temperature Digital ASICs in Silicon Carbide
2019 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Electronics such as microprocessors are highly demanded to monitor or control a process or operation in temperature critical (300 ºC to 600 °C) applications. State-of-the-art silicon-based integrated circuits (ICs) have been improved significantly throughout the years but mainly for a low-temperature ambient. At a temperature higher than 300 ºC silicon-on-insulator (SOI) or bulk silicon-based electronics cannot operate reliably. Therefore the wide bandgap (WBG) semiconductor materials such as silicon carbide (SiC) come into play.

In recent years, many types of SiC-based devices and low complex ICs have been reported and are operational at a high temperature (HT). The main goal of the thesis is to explore and demonstrate the feasibility of SiC-based circuits that are complex, dense and monolithically integrated for high-temperature applications such as a central-processing-unit (CPU).

This thesis work demonstrates a Process Design Kit (PDK) for the SiC-based large scale integrated (LSI) circuits implementation. It consists of discrete devices, gate and module library, and SiC ICs verification programs. The thesis work reports the PDK results over the full temperature range of 25 to 500 °C with a power supply of 10 V to 20 V.

The thesis work demonstrates a 4-bit CPU architecture designed for a proposed instruction set. Manual place and route with around 10,000 devices and area of 150 mm2 were carried out using the PDK standard cell library. The CPU and integral parts have been implemented at the transistor level using the PDK gate/module library and simulated from 25 to 500 °C. The CPU has been fabricated in the in-house low-power SiC bipolar process and measured at a high temperature.

The thesis work also reports reference analog and mixed-signal ICs. A 555-timer consisting of both digital and analog circuits has been designed, integrated and characterized up to 500 °C. Flash and SAR ADCs have been implemented using the PDK for HT applications. A 256-pixel image-sensor design and layout were also carried out using the PDK.

This thesis work is an important step and has laid the foundation of SiC-based LSI circuits realization for extreme environment applications.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2019. p. vii-xix, 148
Series
TRITA-EECS-AVL ; 2019:53
Keywords
Silicon Carbide, high-temperature digital integrated circuits, process design kit (PDK), bipolar logic gates, transistor-transistor logic (TTL), TTL CPU, bipolar transistor, LSI Circuits, ASICs
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Information and Communication Technology
Identifiers
urn:nbn:se:kth:diva-251766 (URN)978-91-7873-225-8 (ISBN)
Public defence
2019-06-14, Sal-B, Kistagången 16, Kista, 10:00 (English)
Opponent
Supervisors
Funder
Knut and Alice Wallenberg Foundation
Note

QC 20190521

Available from: 2019-05-21 Created: 2019-05-21 Last updated: 2019-05-21Bibliographically approved

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Zetterling, Carl-Mikael

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