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SiC CMOS and memory devices for high-temperature integrated circuits
KTH, School of Electrical Engineering and Computer Science (EECS), Electronics.ORCID iD: 0000-0002-1016-6085
2019 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

High-temperature electronics find use in extreme environments, like data logging in downhole drilling for geothermal energy production, inside of high-temperature turbines, industrial gas sensors and space electronics. The simplest systems use a sensor and a transmitter, but more advance electronic systems would additionally require a microcontroller with memory. Silicon carbide (4H-SiC) integrated circuits target high-temperature electronics, although the current integration level is low due to immature process technology and non-volatile memory has not been demonstrated. SiC CMOS would allow highly dense integrated circuits for microcontrollers and random access memory (RAM). Ferroelectric capacitors could serve as high-temperature non-volatile memory devices.

In this work, significant efforts have been taken to develop a SiC CMOS process and ferroelectric capacitors. SiC CMOS is challenging and mostly unexplored technology. A recessed channel transistor design was investigated. Several key challenges in the SiC CMOS process was identified, leading to a polyoxide-based field oxide, a deposited gate-dielectric process, reproducible Ni-Al semi-salicide contacts to p-type SiC, and a high-temperature CMP enabled two-level TiW-based metallisation. Self-aligned cobalt silicide contacts were investigated, and was found to produce low-resistance ohmic contactsto n-type SiC. Inverters and ring oscillators that operate at 200 °C were achieved in this recessed channel SiC CMOS process. It was found that steam-treating the gate oxide interface produced both NMOS and PMOS transistors that could be used for circuits. However, the reliability suffered due to poor PMOS performance. Wafer-level statistical measurements of interface trap density was performed on NMOS transistors treated by steam, dry oxygen and nitrided by nitrous oxide. A deposition and etch process for ferroelectric capacitors, using vanadium-doped bismuth titanate as ferroelectric material, was developed. High-temperature operation was demonstrated, and several scalability challenges for the etched process was identified.

The implication of this thesis is that while operational recessed channel SiC CMOS was demonstrated at high temperature, more promising technologies like ion implanted bulk transistors should be investigated instead, due to the numerous difficulties in optimising both NMOS and PMOS with this recessed channel design. The presented recessed channel process technology can be used to fabricate short channel length NMOS-logic. Ferroelectric capacitors is a good candidate for high-temperature non-volatile memory applications, although more work is needed in the CMOS integration.

Abstract [sv]

Högtemperaturelektronik används i extrema miljöer, såsom borrhålsloggning för geotermisk energiutvinning, inuti högtemperaturturbiner, industrigassensorer och rymdelektronik. De enklaste systemen använder sig av en sensor och en radio, men mer komplicerade system använder sig dessutom av en mikrokontroller med minne. Integrerade kretsar i kiselkarbidsteknik (4H-SiC) är lämpade för högtemperaturelektronik, men den nuvarande integrationsnivån är låg p.g.a. den nuvarande omogna processtekniken. Icke-flyktiga minnen för högtemperaturtillämpningar har inte demonstrerats. CMOS-elektronik i kiselkarbidsteknik (SiC CMOS) skulle möjliggöra mikrokontroller och direktminne (eng. random access memory, RAM) tack vare den höga integrationstätheten. Ferroelektriska kondensatorer kan fungera som icke-flyktiga minneskomponenter för högtemperaturtillämpningar.

Denna avhandling presenterar ett omfattande utvecklingsarbete av SiC CMOS och ferroelektriska kondensatorer. SiC CMOS är en utmanande och till stor del outforskad teknologi. En recessad kanal transistordesign undersöktes. Några nyckelutmaningar identifierades för SiC CMOS processen. Dessa utmaningarresulterade i en polyoxidbaserad fältoxid, en deponerad grinddielektrikumprocess, reproducerbara Ni-Al halv-självlinjerade kontakter till p-typ kiselkarbid, och en högtemperatur CMP-möjliggjord tvånivås titanvolframbaserad metallisering. En självlinjerad koboltsilicid-kontaktprocess undersöktes, och det visade sig att den gav lågresistiva ohmska kontakter till n-typ kiselkarbid. Inverterare och ringoscillatorer som fungerar vid 200 °C kunde demonstreras med denna recessad kanal transistordesign. Ångbehandlad grindoxidgränssnitt ger fungerande NMOS- och PMOS-transistorer som kunde användas för CMOS kretsar. Dock så led pålitligheten hos CMOS kretsarna p.g.a. PMOS transistorernas låga prestanda. Statistisk mätning av gränssnittsfälltäthet på skivnivå genomfördes för NMOS transistorer som hade blivit behandlade med ånga, torr syrgas och nitriderade via lustgas. En deponering- och etsprocess för tillverkning av ferroelektriska kondensatorer, där det ferroelektriska materialet var vanadiumdopat vismuttitanat, togs fram. Högtemperaturfunktionalitet påvisades, och flera nedskalningsutmaningar hos den etsade processen identifierades.

Trots att den recessade kanal SiC CMOS processen var bra nog för att demonstrera högtemperaturkretsar, så visar resultatet av denna avhandling att det kan finnas bättre alternativ till denna process. Inneboende processutmaningari transistordesignen i sig gör det svårt att optimera NMOS och PMOS transistorer som är bra nog för CMOS. Jonimplanterade bulktransistorer är mer lovande. Den utvecklade processen kan användas för att tillverka NMOS-logik med kortkanalstransistorer. Ferroelektriska kondensatorer är en lämplig kandidat som icke-flyktigt minne för högtemperaturtillämpningar, men mer arbete krävs för CMOS-integration.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2019. , p. 241
Series
TRITA-EECS-AVL ; 2019:42
Keywords [en]
bismuth titanate (Bi4Ti3O12), CMOS, ferroelectric capacitor, field oxide, inverter, metallisation, metal oxide semiconductor field effect transistor (MOSFET), ohmic contacts, ring oscillator, semiconductor processing, silicon carbide (4H-SiC)
Keywords [sv]
CMOS, ferroelektrisk kondensator, fältoxid, halvledartillverkning, inverterare, kiselkarbid (4H-SiC), metallisering, MOSFET, ohmska kontakter, ringoscillator, vismuttitanat (Bi4Ti3O12)
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Information and Communication Technology
Identifiers
URN: urn:nbn:se:kth:diva-250276ISBN: 978-91-7873-180-0 (print)OAI: oai:DiVA.org:kth-250276DiVA, id: diva2:1307563
Public defence
2019-05-24, Sal B, Kistagången 16, Kista, 10:00 (English)
Opponent
Supervisors
Funder
Knut and Alice Wallenberg Foundation, Working on VenusSwedish Foundation for Strategic Research , CMP Lab
Note

QC 20190428

Available from: 2019-04-29 Created: 2019-04-28 Last updated: 2019-04-29Bibliographically approved
List of papers
1. Integration and High-Temperature Characterization of Ferroelectric Vanadium-Doped Bismuth Titanate Thin Films on Silicon Carbide
Open this publication in new window or tab >>Integration and High-Temperature Characterization of Ferroelectric Vanadium-Doped Bismuth Titanate Thin Films on Silicon Carbide
2017 (English)In: Journal of Electronic Materials, ISSN 0361-5235, E-ISSN 1543-186X, Vol. 46, no 7, p. 4478-4484Article in journal (Refereed) Published
Abstract [en]

4H-SiC electronics can operate at high temperature (HT), e.g., 300A degrees C to 500A degrees C, for extended times. Systems using sensors and amplifiers that operate at HT would benefit from microcontrollers which can also operate at HT. Microcontrollers require nonvolatile memory (NVM) for computer programs. In this work, we demonstrate the possibility of integrating ferroelectric vanadium-doped bismuth titanate (BiTV) thin films on 4H-SiC for HT memory applications, with BiTV ferroelectric capacitors providing memory functionality. Film deposition was achieved by laser ablation on Pt (111)/TiO2/4H-SiC substrates, with magnetron-sputtered Pt used as bottom electrode and thermally evaporated Au as upper contacts. Film characterization by x-ray diffraction analysis revealed predominately (117) orientation. P-E hysteresis loops measured at room temperature showed maximum 2P (r) of 48 mu C/cm(2), large enough for wide read margins. P-E loops were measurable up to 450A degrees C, with losses limiting measurements above 450A degrees C. The phase-transition temperature was determined to be about 660A degrees C from the discontinuity in dielectric permittivity, close to what is achieved for ceramics. These BiTV ferroelectric capacitors demonstrate potential for use in HT NVM applications for SiC digital electronics.

Place, publisher, year, edition, pages
SPRINGER, 2017
Keywords
Ferroelectric, high temperature (HT), memory device, silicon carbide (4H-SiC), thin film, vanadium-doped bismuth titanate (BiTV)
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-210461 (URN)10.1007/s11664-017-5447-3 (DOI)000403016800089 ()2-s2.0-85015704004 (Scopus ID)
Funder
Knut and Alice Wallenberg Foundation
Note

QC 20170706

Available from: 2017-07-06 Created: 2017-07-06 Last updated: 2019-04-29Bibliographically approved
2. Low temperature Ni-Al ohmic contacts to p-TYPE 4H-SiC using semi-salicide processing
Open this publication in new window or tab >>Low temperature Ni-Al ohmic contacts to p-TYPE 4H-SiC using semi-salicide processing
Show others...
2018 (English)In: International Conference on Silicon Carbide and Related Materials, ICSCRM 2017, Trans Tech Publications, 2018, Vol. 924, p. 389-392Conference paper, Published paper (Refereed)
Abstract [en]

Most semiconductor devices require low-resistance ohmic contact to p-type doped regions. In this work, we present a semi-salicide process that forms low-resistance contacts (~10-4 Ω cm2) to epitaxially grown p-type (>5×1018 cm-3) 4H-SiC at temperatures as low as 600 °C using rapid thermal processing (RTP). The first step is to self-align the nickel silicide (Ni2Si) at 600 °C. The second step is to deposit aluminium on top of the silicide, pattern it and then perform a second annealing step in the range 500 °C to 700 °C.

Place, publisher, year, edition, pages
Trans Tech Publications, 2018
Series
Materials Science Forum, ISSN 0255-5476 ; 924
Keywords
Ni-Al, P-type ohmic contact, Rapid thermal processing (RTP), Silicon carbide (4H-SiC), Transfer length method (TLM)
National Category
Other Engineering and Technologies
Identifiers
urn:nbn:se:kth:diva-238393 (URN)10.4028/www.scientific.net/MSF.924.389 (DOI)2-s2.0-85049019579 (Scopus ID)9783035711455 (ISBN)
Conference
International Conference on Silicon Carbide and Related Materials, ICSCRM 2017, Columbia, United States, 17 September 2017 through 22 September 2017
Note

QC 20181108

Available from: 2018-11-08 Created: 2018-11-08 Last updated: 2019-04-29Bibliographically approved
3. Investigation of a Self-Aligned Cobalt Silicide Process for Ohmic Contacts to Silicon Carbide
Open this publication in new window or tab >>Investigation of a Self-Aligned Cobalt Silicide Process for Ohmic Contacts to Silicon Carbide
2019 (English)In: Journal of Electronic Materials, ISSN 0361-5235, E-ISSN 1543-186X, Vol. 48, no 4, p. 2509-2516Article in journal (Refereed) Published
Abstract [en]

Previous studies showed that cobalt silicide can form ohmic contacts to p-type 6H-SiC by directly reacting cobalt with 6H-SiC. Similar results can be achieved on 4H-SiC, given the similarities between the different silicon carbide polytypes. However, previous studies using multilayer deposition of silicon/cobalt on 4H-SiC gave ohmic contacts to n-type. In this study, we investigated the cobalt silicide/4H-SiC system to answer two research questions. Can cobalt contacts be self-aligned to contact holes to 4H-SiC? Are the self-aligned contacts ohmic to n-type, p-type, both or neither? Using x-ray diffraction, it was found that a mixture of silicides (Co2Si and CoSi) was reliably formed at 800°C using rapid thermal processing. The cobalt silicide mixture becomes ohmic to epitaxially grown n-type (1×1019cm-3) if annealed at 1000°C, while it shows rectifying properties to epitaxially grown p-type (1×1019cm-3) for all tested anneal temperatures in the range 800–1000°C. The specific contact resistivity (ρC) to n-type was 4.3×10-4 Ω cm2. This work opens the possibility to investigate other self-aligned contacts to silicon carbide.

Place, publisher, year, edition, pages
Springer, 2019
Keywords
Cobalt (Co), rapid thermal processing (RTP), self-aligned silicide, silicon carbide (4H-SiC), transfer length method (TLM)
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-250274 (URN)10.1007/s11664-019-07020-0 (DOI)000460453100095 ()2-s2.0-85061514454 (Scopus ID)
Funder
Knut and Alice Wallenberg Foundation, Working on Venus
Note

QC 20190428

Available from: 2019-04-27 Created: 2019-04-27 Last updated: 2019-04-29Bibliographically approved
4. High-Temperature Recessed Channel SiC CMOS Inverters and Ring Oscillators
Open this publication in new window or tab >>High-Temperature Recessed Channel SiC CMOS Inverters and Ring Oscillators
2019 (English)In: IEEE Electron Device Letters, ISSN 0741-3106, E-ISSN 1558-0563, Vol. 40, no 5, p. 670-673Article in journal (Refereed) Published
Abstract [en]

Digital electronics in SiC find use in high-temperature applications. The objective of this study was to fabricate SiC CMOS without using ion implantation. In this letter, we present a recessed channel CMOS process. Selective doping is achieved by etching epitaxial layers into mesas. A deposited SiO2-film, post-annealed at lowtemperature and re-oxidized in pyrogenic steam, is used as the gate oxide to produce a conformal gate oxide over the non-planar topography. PMOS, NMOS, inverters, and ring oscillators are characterized at 200 °C. The PMOS requires reduced threshold voltage in order to enable long term reliability. This result demonstrates that it is possible to fabricate SiC CMOS without ion implantation and by low-temperature processing.

Keywords
Inverter, recessed channel, ring oscillator (RO), silicon carbide (4H-SiC), static CMOS
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-250275 (URN)10.1109/LED.2019.2903184 (DOI)000466190700002 ()2-s2.0-85064992240 (Scopus ID)
Funder
Knut and Alice Wallenberg Foundation, Working on VenusSwedish Foundation for Strategic Research , CMP Lab
Note

QC 20190428

Available from: 2019-04-27 Created: 2019-04-27 Last updated: 2019-10-24Bibliographically approved

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