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Pixel-based biosensor for enhanced control: silicon nanowires monolithically integrated with field-effect transistors in fully depleted silicon on insulator technology
KTH, School of Electrical Engineering and Computer Science (EECS), Electronics.ORCID iD: 0000-0001-9690-2292
KTH, School of Electrical Engineering and Computer Science (EECS).ORCID iD: 0000-0002-5845-3032
2019 (English)In: Nanotechnology, ISSN 0957-4484, E-ISSN 1361-6528, Vol. 30, no 22, article id 225502Article in journal (Refereed) Published
Abstract [en]

Silicon nanowires (SiNWs) are a widely used technology for sensing applications. Complementary metal-oxide-semiconductor (CMOS) integration of SiNWs advances lab-on-chip (LOC) technology and offers opportunities for read-out circuit integration, selective and multiplexed detection. In this work, we propose novel scalable pixel-based biosensors exploiting the integration of SiNWs with CMOS in fully-depleted silicon-on-insulator technology. A detailed description of the wafer-scale fabrication of SiNW pixels using the CMOS compatible sidewall-transfer-lithography as an alternative to widely investigated time inefficient e-beam lithography is presented. Each 60 nm wide SiNWs sensor is monolithically connected to a control transistor and novel on-chip fluid-gate forming an individual pixel that can be operated in two modes: biasing transistor frontgate (V-G) or substrate backgate (V-BG). We also present the first electrical results of single N and P-type SiNW pixels. In frontgate mode, N and P-type SiNW pixels exhibit subthreshold slope (SS) approximate to 70-80 mV/dec and I-on/I-off approximate to 10(5). The N-type and P-type pixels have an average threshold voltage, Vth of -1.7 V and 0.85 V respectively. In the backgate mode, N and P-type SiNW pixels exhibit SS approximate to 100-150 mV/dec and I-on/I-off approximate to 10(6). The N and P-type pixels have an average V-th of 5 V and -2.5 V respectively. Further, the influence of the backgate and frontgate voltage on the switching characteristics of the SiNW pixels is also studied. In the frontgate mode, the Vth of the SiNW pixels can be tuned at 0.2 V for 1 V change in V-BG for N-type or at -0.2 V for -1 V change in V-BG for P-type pixels. In the backgate mode, it is found that for stable operation of the pixels, the V-G of the N and P-type transistors must be in the range 0.5-2.5 V and 0 V to -2.5 V respectively.

Place, publisher, year, edition, pages
IOP PUBLISHING LTD , 2019. Vol. 30, no 22, article id 225502
Keywords [en]
silicon nanowire pixel; silicon nanowire biosensor; lab-on-chip; SiNW CMOS integration; selective multiplexed detection; SiNW frontgate mode; SiNW backgate mode
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-248056DOI: 10.1088/1361-6528/ab0469ISI: 000461650400002PubMedID: 30721898Scopus ID: 2-s2.0-85063252229OAI: oai:DiVA.org:kth-248056DiVA, id: diva2:1307903
Note

QC 20190429

Available from: 2019-04-29 Created: 2019-04-29 Last updated: 2019-04-29Bibliographically approved

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Jayakumar, GaneshÖstling, Mikael

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