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Wafer-Level Vacuum Sealing for Packaging of Silicon Photonic MEMS
KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.ORCID iD: 0000-0002-2752-7422
KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.ORCID iD: 0000-0002-7339-6662
KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.ORCID iD: 0000-0002-4867-0391
KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Micro and Nanosystems.ORCID iD: 0000-0002-3325-8273
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2021 (English)In: Proceedings SPIE OPTO 6-12 march 2021 silicon photonics XVI / [ed] Graham T. Reed, Andrew P. Knights, SPIE-Intl Soc Optical Eng , 2021, Vol. 11691Conference paper, Published paper (Other academic)
Abstract [en]

Silicon (Si) photonic micro-electro-mechanical systems (MEMS), with its low-power phase shifters and tunable couplers, is emerging as a promising technology for large-scale reconfigurable photonics with potential applications for example in photonic accelerators for artificial intelligence (AI) workloads. For silicon photonic MEMS devices, hermetic/vacuum packaging is crucial to the performance and longevity, and to protect the photonic devices from contamination. Here, we demonstrate a wafer-level vacuum packaging approach to hermetically seal Si photonic MEMS wafers produced in the iSiPP50G Si photonics foundry platform of IMEC. The packaging approach consists of transfer bonding and sealing the silicon photonic MEMS devices with 30 µm-thick Si caps, which were prefabricated on a 100 mm-diameter silicon-on-insulator (SOI) wafer. The packaging process achieved successful wafer-scale vacuum sealing of various photonic devices. The functionality of photonic MEMS after the hermetic/vacuum packaging was confirmed. Thus, the demonstrated thin Si cap packaging shows the possibility of a novel vacuum sealing method for MEMS integrated in standard Si photonics platforms.

Place, publisher, year, edition, pages
SPIE-Intl Soc Optical Eng , 2021. Vol. 11691
Keywords [en]
vacuum, hermetic, wafer-level packaging, sealing, iSiPP50G, Si photonics, MEMS
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Electrical Engineering
Identifiers
URN: urn:nbn:se:kth:diva-292570DOI: 10.1117/12.2582975ISI: 000672828700007Scopus ID: 2-s2.0-85105926372OAI: oai:DiVA.org:kth-292570DiVA, id: diva2:1542824
Conference
SPIE OPTO 2021 Silicon Photonics XVI , 6-12 March 2021, Online Only, California, United States
Projects
MORPHiCZeroAMPULISSES
Funder
EU, Horizon 2020, 780283EU, Horizon 2020, 871740EU, Horizon 2020, 825272
Note

QC 20210710

Available from: 2021-04-08 Created: 2021-04-08 Last updated: 2022-06-25Bibliographically approved

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Jo, GaehunEdinger, PierreBleiker, Simon J.Wang, XiaojingStemme, GöranGylfason, KristinnNiklaus, Frank

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