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Two-stage Network Processor for an Independent HVDC Grid Supervisory Control
KTH, Skolan för elektro- och systemteknik (EES), Industriella informations- och styrsystem.ORCID-id: 0000-0003-3946-7655
Dept. of Electrical, Electronic and Information Engineering University of Bologna , Italy.
KTH, Skolan för elektro- och systemteknik (EES), Industriella informations- och styrsystem.ORCID-id: 0000-0002-2014-0444
Dept. of Electrical, Electronic and Information Engineering University of Bologna , Italy.
Vise andre og tillknytning
2016 (engelsk)Konferansepaper, Publicerat paper (Fagfellevurdert)
Abstract [en]

This paper proposes a two-stage network processorfor the supervisory control of multi-terminal HVDC grid thatconnects different AC areas. The proposed network processorprocesses the DC substation topology locally in the first stageand analyzes the HVDC grid connectivity at the supervisorycontroller. The processor uses the k-means clustering methodto detect the islands in HVDC grid and prepares requiredinformation to carry out the converter control mode assignation.The performance of the method has been tested for an isladingscenario in a 7-terminal HVDC grid using a real-time cosimulationplatform. The output of network processor helps thecontrol application at the supervisory level to make decisionsbased on the control modes of the available converters in theislands. This two-stage architecture has been compared with thecentralized architecture in terms of computational complexity.

sted, utgiver, år, opplag, sider
2016.
HSV kategori
Identifikatorer
URN: urn:nbn:se:kth:diva-178725DOI: 10.1109/PESGM.2016.7741289ISI: 000399937900222Scopus ID: 2-s2.0-85002057632OAI: oai:DiVA.org:kth-178725DiVA, id: diva2:878054
Konferanse
IEEE PES GM 2016
Merknad

QC 20170313

Tilgjengelig fra: 2015-12-08 Laget: 2015-12-08 Sist oppdatert: 2024-03-18bibliografisk kontrollert

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Babazadeh, DavoodArmendariz, MikelNordström, Lars

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Totalt: 579 treff
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