Ändra sökning
RefereraExporteraLänk till posten
Permanent länk

Direktlänk
Referera
Referensformat
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Annat format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annat språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf
A formal, model-driven design flow for system simulation and multi-core implementation
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.ORCID-id: 0000-0002-2171-1528
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.
KTH, Skolan för informations- och kommunikationsteknik (ICT), Elektronik och Inbyggda System.ORCID-id: 0000-0003-4859-3100
Visa övriga samt affilieringar
2015 (Engelska)Ingår i: 2015 10th IEEE International Symposium on Industrial Embedded Systems, IEEE , 2015, s. 254-263Konferensbidrag, Publicerat paper (Refereegranskat)
Resurstyp
Text
Abstract [en]

With the growing complexity of Real-Time Embedded Systems (RTES), there is a huge interest in using modeling languages such as the Unified Modeling Language (UML), and other Model-Driven Engineering (MDE) techniques targeting RTES system design. These approaches provide language abstractions for system design, allowing to focus on their relevant properties. Unfortunately, such approaches still suffer from several shortcomings including the lack of well-defined semantics. Therefore, it remains difficult to connect the MDE specification tools and the design tools that are based on formal grounds and well-defined semantics to perform analysis, validation or system synthesis for RTES. This paper presents a top-down RTES design flow aiming to reduce the gap between MDE and formal design approaches. We present the connection between a framework dedicated to the enrichment of modeling languages such as UML with formal semantics, a framework based on formal models of computation supporting validation by simulation, and a system synthesis tool targeting a flexible platform with well-defined execution services. Our purpose is to cover several system design phases from specification, simulation down to implementation on a platform. As a case study, a JPEG Encoder application was realized following the different design steps of the tool-chain.

Ort, förlag, år, upplaga, sidor
IEEE , 2015. s. 254-263
Nationell ämneskategori
Inbäddad systemteknik
Identifikatorer
URN: urn:nbn:se:kth:diva-187135DOI: 10.1109/SIES.2015.7185067ISI: 000380569800033Scopus ID: 2-s2.0-84959543996ISBN: 978-1-4673-7711-9 (tryckt)OAI: oai:DiVA.org:kth-187135DiVA, id: diva2:929219
Konferens
10th IEEE International Symposium on Industrial Embedded Systems, SIES 2015; Siegen; Germany
Anmärkning

QC 20160518

Tillgänglig från: 2016-05-18 Skapad: 2016-05-17 Senast uppdaterad: 2016-09-06Bibliografiskt granskad

Open Access i DiVA

Fulltext saknas i DiVA

Övriga länkar

Förlagets fulltextScopus

Personposter BETA

Attarzadeh-Niaki, Seyed HoseinSander, IngoÖberg, Johnny

Sök vidare i DiVA

Av författaren/redaktören
Attarzadeh-Niaki, Seyed HoseinRobino, FrancescoSander, IngoÖberg, Johnny
Av organisationen
Elektronik och Inbyggda System
Inbäddad systemteknik

Sök vidare utanför DiVA

GoogleGoogle Scholar

doi
isbn
urn-nbn

Altmetricpoäng

doi
isbn
urn-nbn
Totalt: 377 träffar
RefereraExporteraLänk till posten
Permanent länk

Direktlänk
Referera
Referensformat
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Annat format
Fler format
Språk
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Annat språk
Fler språk
Utmatningsformat
  • html
  • text
  • asciidoc
  • rtf