Trade-offs between time and memory in a tighter model of CDCL SAT solvers
2016 (English)In: 19th International Conference on Theory and Applications of Satisfiability Testing, SAT 2016, Springer, 2016, 160-176 p.Conference paper (Refereed)
A long line of research has studied the power of conflict- driven clause learning (CDCL) and how it compares to the resolution proof system in which it searches for proofs. It has been shown that CDCL can polynomially simulate resolution even with an adversarially chosen learning scheme as long as it is asserting. However, the simulation only works under the assumption that no learned clauses are ever forgot- ten, and the polynomial blow-up is significant. Moreover, the simulation requires very frequent restarts, whereas the power of CDCL with less frequent or entirely without restarts remains poorly understood. With a view towards obtaining results with tighter relations between CDCL and resolution, we introduce a more fine-grained model of CDCL that cap- tures not only time but also memory usage and number of restarts. We show how previously established strong size-space trade-offs for resolution can be transformed into equally strong trade-offs between time and memory usage for CDCL, where the upper bounds hold for CDCL with- out any restarts using the standard 1UIP clause learning scheme, and the (in some cases tightly matching) lower bounds hold for arbitrarily frequent restarts and arbitrary clause learning schemes.
Place, publisher, year, edition, pages
Springer, 2016. 160-176 p.
Commerce, Formal logic, Clause learning, Fine grained, Learning schemes, Lower bounds, Memory usage, Resolution proofs, SAT solvers, Upper Bound, Economic and social effects
IdentifiersURN: urn:nbn:se:kth:diva-195488DOI: 10.1007/978-3-319-40970-2_11ISI: 000387430600011ScopusID: 2-s2.0-84977484096ISBN: 9783319409696OAI: oai:DiVA.org:kth-195488DiVA: diva2:1047764
5 July 2016 through 8 July 2016
QC 201611182016-11-182016-11-032016-12-22Bibliographically approved