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Real-time analysis for wormhole NoC: Revisited and revised
KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.ORCID iD: 0000-0003-0061-3475
2016 (English)In: Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, Association for Computing Machinery (ACM), 2016, 75-80 p.Conference paper (Refereed)
Abstract [en]

The network delay upper-bound analysis problem is of fundamental importance to real-time applications in Network-on-Chip (NoC). In the paper, we revisit a state-of-the-art analysis model for real-time communication in wormhole NoC with priority-based preemptive arbitration and show that the model may provide pessimistic or even incorrect network delay upper-bound. We then propose a revised analysis model to correct the flaws in the previous model by further classifying indirect interference as upstream and downstream indirect interferences according to the relative positions of traffic flows and taking buffer influence into consideration. Simulated evaluations show that our model provides tighter and correct network delay upper-bound compared with the state-of-the-art model.

Place, publisher, year, edition, pages
Association for Computing Machinery (ACM), 2016. 75-80 p.
Keyword [en]
Network delay, Real-time communication, Wormhole NoC
National Category
Communication Systems
URN: urn:nbn:se:kth:diva-195038DOI: 10.1145/2902961.2903023ScopusID: 2-s2.0-84974681163ISBN: 978-145034274-2OAI: diva2:1048788
26th ACM Great Lakes Symposium on VLSI, GLSVLSI 2016, Boston, United States, 18 May 2016 through 20 May 2016

QC 20161122

Available from: 2016-11-22 Created: 2016-11-01 Last updated: 2016-11-22Bibliographically approved

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Lu, Zhonghai
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Electronics and Embedded Systems
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