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Opportunistic Competition Overhead Reduction for Expediting Critical Section in NoC Based CMPs
KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.ORCID iD: 0000-0001-9448-5595
KTH, School of Information and Communication Technology (ICT), Electronics and Embedded Systems.ORCID iD: 0000-0003-0061-3475
2016 (English)In: Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016, IEEE, 2016, 279-290 p.Conference paper, Published paper (Refereed)
Abstract [en]

With the degree of parallelism increasing, performance of multi-threaded shared variable applications is not only limited by serialized critical section execution, but also by the serialized competition overhead for threads to get access to critical section. As the number of concurrent threads grows, such competition overhead may exceed the time spent in critical section itself, and become the dominating factor limiting the performance of parallel applications. In modern operating systems, queue spinlock, which comprises a low-overhead spinning phase and a high-overhead sleeping phase, is often used to lock critical sections. In the paper, we show that this advanced locking solution may create very high competition overhead for multithreaded applications executing in NoC-based CMPs. Then we propose a software-hardware cooperative mechanism that can opportunistically maximize the chance that a thread wins the critical section access in the low-overhead spinning phase, thereby reducing the competition overhead. At the OS primitives level, we monitor the remaining times of retry (RTR) in a thread's spinning phase, which reflects in how long the thread must enter into the high-overhead sleep mode. At the hardware level, we integrate the RTR information into the packets of locking requests, and let the NoC prioritize locking request packets according to the RTR information. The principle is that the smaller RTR a locking request packet carries, the higher priority it gets and thus quicker delivery. We evaluate our opportunistic competition overhead reduction technique with cycle-accurate full-system simulations in GEM5 using PARSEC (11 programs) and SPEC OMP2012 (14 programs) benchmarks. Compared to the original queue spinlock implementation, experimental results show that our method can effectively increase the opportunity of threads entering the critical section in low-overhead spinning phase, reducing the competition overhead averagely by 39.9% (maximally by 61.8%) and accelerating the execution of the Region-of-Interest averagely by 14.4% (maximally by 24.5%) across all 25 benchmark programs.

Place, publisher, year, edition, pages
IEEE, 2016. 279-290 p.
Keyword [en]
CMP, Critical Section, NoC, OS, Computer architecture, Computer hardware, Hardware, Image segmentation, Locks (fasteners), Network-on-chip, Osmium, Reconfigurable hardware, Concurrent threads, Cooperative mechanisms, Critical sections, Degree of parallelism, Full-system simulation, Multi-threaded application, Overhead reductions, Parallel application, Cost reduction
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-194939DOI: 10.1109/ISCA.2016.33ISI: 000389548600023Scopus ID: 2-s2.0-84988369476ISBN: 9781467389471 (print)OAI: oai:DiVA.org:kth-194939DiVA: diva2:1049392
Conference
43rd International Symposium on Computer Architecture, ISCA 2016, 18 June 2016 through 22 June 2016
Note

QC 20161124

Available from: 2016-11-24 Created: 2016-11-01 Last updated: 2017-01-23Bibliographically approved

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