The Monolithic 3D (M3D) integration technologyhas emerged as a promising alternative to dimensional scalingthanks to the unprecedented integration density capabilitiesand the low interconnect parasitics that it offers. In orderto support technological investigations and enable future M3Dcircuits, M3D design methodologies, flows and tools are essential.Prospective M3D digital applications have attracted a lot ofscientific interest. This paper identifies the potential of M3DRF/analog circuits and presents the first attempt to demonstratesuch circuits. Towards this, a M3D custom design platform, whichis fully compatible with commercial design tools, is proposed andvalidated. The design platform includes process characteristics,device models, LVS and DRC rules and a parasitic extractionflow. The envisioned M3D structure is built on a commercialCMOS process that serves as the bottom tier, whereas a SOIprocess is used as top tier. To validate the proposed design flowand to investigate the potential of M3D RF/analog circuits, aRF front-end design for Zig-Bee WPAN applications is used ascase-study. The M3D RF front-end circuit achieves 35.5 % areareduction, while showing similar performance with the original2D circuit.