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Exploring Application Performance on Emerging Hybrid-Memory Supercomputers
KTH, School of Computer Science and Communication (CSC), Computational Science and Technology (CST).
KTH, School of Computer Science and Communication (CSC), Computational Science and Technology (CST).
KTH, School of Computer Science and Communication (CSC), Computational Science and Technology (CST).
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2017 (English)In: Proceedings - 18th IEEE International Conference on High Performance Computing and Communications, 14th IEEE International Conference on Smart City and 2nd IEEE International Conference on Data Science and Systems, HPCC/SmartCity/DSS 2016, Institute of Electrical and Electronics Engineers (IEEE), 2017, p. 473-480, article id 7828415Conference paper, Published paper (Refereed)
Abstract [en]

Next-generation supercomputers will feature more hierarchical and heterogeneous memory systems with different memory technologies working side-by-side. A critical question is whether at large scale existing HPC applications and emerging data-analytics workloads will have performance improvement or degradation on these systems. We propose a systematic and fair methodology to identify the trend of application performance on emerging hybrid-memory systems. We model the memory system of next-generation supercomputers as a combination of 'fast' and 'slow' memories. We then analyze performance and dynamic execution characteristics of a variety of workloads, from traditional scientific applications to emerging data analytics to compare traditional and hybrid-memory systems. Our results show that data analytics applications can clearly benefit from the new system design, especially at large scale. Moreover, hybrid-memory systems do not penalize traditional scientific applications, which may also show performance improvement.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2017. p. 473-480, article id 7828415
Keyword [en]
Hybrid-memory system, Large-scale applications, Performance characterization
National Category
Computer Engineering
Identifiers
URN: urn:nbn:se:kth:diva-208452DOI: 10.1109/HPCC-SmartCity-DSS.2016.0074ISI: 000401700900063Scopus ID: 2-s2.0-85013674475ISBN: 9781509042968 (print)OAI: oai:DiVA.org:kth-208452DiVA, id: diva2:1107176
Conference
18th IEEE International Conference on High Performance Computing and Communications, 14th IEEE International Conference on Smart City and 2nd IEEE International Conference on Data Science and Systems, HPCC/SmartCity/DSS 2016, Sydney, Australia, 12 December 2016 through 14 December 2016
Note

QC 20170609

Available from: 2017-06-09 Created: 2017-06-09 Last updated: 2018-01-13Bibliographically approved
In thesis
1. Data Movement on Emerging Large-Scale Parallel Systems
Open this publication in new window or tab >>Data Movement on Emerging Large-Scale Parallel Systems
2017 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

Large-scale HPC systems are an important driver for solving computational problems in scientific communities. Next-generation HPC systems will not only grow in scale but also in heterogeneity. This increased system complexity entails more challenges to data movement in HPC applications. Data movement on emerging HPC systems requires asynchronous fine-grained communication and efficient data placement in the main memory. This thesis proposes an innovative programming model and algorithm to prepare HPC applications for the next computing era: (1) a data streaming model that supports emerging data-intensive applications on supercomputers, (2) a decoupling model that improves parallelism and mitigates the impact of imbalance in applications, (3) a new framework and methodology for predicting the impact of largescale heterogeneous memory systems on HPC applications, and (4) a data placement algorithm that uses a set of rules and a decision tree to determine the data-to-memory mapping in heterogeneous main memory.

The proposed approaches in this thesis are evaluated on multiple supercomputers with different processors and interconnect networks. The evaluation uses a diverse set of applications that represent conventional scientific applications and emerging data-analytic workloads on HPC systems. The experimental results on the petascale testbed show that the approaches obtain increasing performance improvements as system scale increases and this trend supports the approaches as a valuable contribution towards future HPC systems.

Abstract [sv]

Storskaliga HPC-system är en viktig drivkraft för att lösa datorproblem i vetenskapliga samhällen. Nästa generations HPC-system kommer inte bara att växa i skala utan också i heterogenitet. Denna ökade systemkomplexitet medför flera utmaningar för dataförflyttning i HPC-applikationer. Dataförflyttning på nya HPC-system kräver asynkron, finkorrigerad kommunikation och en effektiv dataplacering i huvudminnet.

Denna avhandling föreslår en innovativ programmeringsmodell och algoritm för att förbereda HPC-applikationer för nästa generation: (1) en dataströmningsmodell som stöder nya dataintensiva applikationer på superdatorer, (2) en kopplingsmodell som förbättrar parallelliteten och minskar obalans i applikationer, (3) en ny metologi och struktur för att förutse effekten av storskaliga, heterogena minnessystem på HPC-applikationer, och (4) en datalägesalgoritm som använder en uppsättning av regler och ett beslutsträd för att bestämma kartläggningen av data-till-minnet i det heterogena huvudminnet.

Den föreslagna programmeringsmodellen i denna avhandling är utvärderad på flera superdatorer med olika processorer och sammankopplingsnät. Utvärderingen använder en mängd olika applikationer som representerar konventionella vetenskapliga applikationer och nya dataanalyser på HPC-system. Experimentella resultat på testbädden i petascala visar att programmeringsmodellen förbättrar prestandan när systemskalan ökar. Denna trend indikerar att modellen är ett värdefullt bidrag till framtida HPC-system.

Place, publisher, year, edition, pages
KTH Royal Institute of Technology, 2017. p. 116
Series
TRITA-CSC-A, ISSN 1653-5723 ; 2017:25
National Category
Computer Sciences
Research subject
Computer Science
Identifiers
urn:nbn:se:kth:diva-218338 (URN)978-91-7729-592-1 (ISBN)
Public defence
2017-12-18, F3, Lindstedtsvägen 26, Stockholm, 10:00 (English)
Opponent
Supervisors
Note

QC 20171128

Available from: 2017-11-28 Created: 2017-11-27 Last updated: 2018-01-13Bibliographically approved

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