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Modelling of HVDC breakers for HVDC grid simulations
KTH, School of Electrical Engineering (EES), Electric Power and Energy Systems. (Power Electronics)ORCID iD: 0000-0001-8911-8352
KTH, School of Electrical Engineering (EES), Electric Power and Energy Systems. (Power Electronics)
KTH, School of Electrical Engineering (EES), Electric Power and Energy Systems. (Power Electronics)
2017 (English)In: IET Conference Publications, Institution of Engineering and Technology, 2017, Vol. 2017, CP709Conference paper, Published paper (Refereed)
Abstract [en]

This paper deals with the modelling of high-voltage direct current (HVDC) breakers in PSCAD. The models are aimed at HVDC grid simulation and are kept as simple as possible. An overview is given over recently proposed HVDC breaker concepts. Assumptions and simplifications are explained as well. The main result is that even these simplified models are too detailed for grid simulations. The reason for this is that from a grid perpective the only thing that matters is when the metal-oxide varistor is inserted. The models can be used to estimate interruption times.

Place, publisher, year, edition, pages
Institution of Engineering and Technology, 2017. Vol. 2017, CP709
Keyword [en]
HVDC, HVDC breaker, HVDC grid, PSCAD
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-210885Scopus ID: 2-s2.0-85019576224OAI: oai:DiVA.org:kth-210885DiVA: diva2:1120679
Conference
13th IET International Conference on AC and DC Power Transmission, AC/DC 2017, Manchester, United Kingdom, 14 February 2017 through 16 February 2017
Note

QC 20170804

Available from: 2017-07-06 Created: 2017-07-06 Last updated: 2017-08-04Bibliographically approved

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