Designing and Evaluating Network Processor Applications
2005 (English)In: IEEE Workshop on High Performance Switching and Routing: Hong Kong, PEOPLES R CHINA, MAY 12-14, 2005, 2005, 142-146 p.Conference paper (Refereed)
Network processors try to achieve the performance of traditional ASICs while providing programmability of general-purpose processors. In short, a network processor provides a programming interface for implementing packet forwarding services. It is therefore important to study how efficient different designs are, as well as investigate how difficult they are to program. In this paper, a network processor model is introduced which is used as a basis for a simulation tool. By sending packets into the simulator, throughput, latency, and utilization can be measured. An IPv4 forwarding application is evaluated using two different processing element topologies: a pipelined and a pooled. In addition, the performance impact of using multiple threads inside a single processing element is evaluated. The results show that the use of parallelism is crucial to achieve high performance, but that both the pipelined topology and pooled topology achieve comparable performance.
Place, publisher, year, edition, pages
2005. 142-146 p.
network processors; parallel processing; pipeline processing; performance evaluation
IdentifiersURN: urn:nbn:se:kth:diva-9329DOI: 10.1109/HPSR.2005.1503211ISI: 000231187500029ScopusID: 2-s2.0-27644566537OAI: oai:DiVA.org:kth-9329DiVA: diva2:113510
QC 201007262008-10-302008-10-202013-06-12Bibliographically approved