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Towards virtual prototyping of synchronous real-time systems on noc-based MPSoCs
KTH, School of Information and Communication Technology (ICT), Electronics.
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2017 (English)In: 2017 12th IEEE International Symposium on Industrial Embedded Systems, SIES 2017 - Proceedings, Institute of Electrical and Electronics Engineers (IEEE), 2017, article id 7993375Conference paper (Refereed)
Abstract [en]

NoC-based designs provide a scalable and flexible communication solution for the rising number of processing cores on a single chip. To master the complexity of the software design in such a NoC-based multi-core architecture, advanced incremental integration testing solutions are required. This work presents a virtual platform based software testing and debugging approach for a synchronous application model on a NoC-based designs provide a scalable and flexible communication solution for the rising number of processing cores on a single chip. To master the complexity of the software design in such a NoC-based multi-core architecture, advanced incremental integration testing solutions are required. This work presents a virtual platform based software testing and debugging approach for a synchronous application model on a 2x2 NoC-based MPSoC. We propose a development approach and a test environment that exploits the time approximation within Imperas OVP instruction accurate simulator and a functional model of the Nostrum NoC, for both software instructions and hardware clock cycles at larger time stamps called Quantum that does not sacrifice functional correctness. The functional testing environment runs the target software without running it on the real hardware platform. With the help of Nostrum NoC we can support a synchronous system execution that is reasonably fast and precise with respect to a global synchronization signal, called HeartBeat. As work in progress, this work also discusses several possible timing refinement and their possible implication on the simulation semantics and performance and how it is tackled in the future work. NoC-based MPSoC. We propose a development approach and a test environment that exploits the time approximation within Imperas OVP instruction accurate simulator and a functional model of the Nostrum NoC, for both software instructions and hardware clock cycles at larger time stamps called Quantum that does not sacrifice functional correctness. The functional testing environment runs the target software without running it on the real hardware platform. With the help of Nostrum NoC we can support a synchronous system execution that is reasonably fast and precise with respect to a global synchronization signal, called HeartBeat. As work in progress, this work also discusses several possible timing refinement and their possible implication on the simulation semantics and performance and how it is tackled in the future work.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2017. article id 7993375
Keywords [en]
Application programs, Clocks, Computer architecture, Computer software, Embedded systems, Hardware, Integration testing, Interactive computer systems, Multiprocessing systems, Network-on-chip, Program debugging, Real time systems, Semantics, Software design, Software testing, System-on-chip, Virtual prototyping, Application modeling, Development approach, Flexible communication, Functional correctness, Global synchronization, Multicore architectures, Software instruction, Software Testing and Debugging, Integrated circuit design
National Category
Other Engineering and Technologies
Identifiers
URN: urn:nbn:se:kth:diva-214376DOI: 10.1109/SIES.2017.7993375Scopus ID: 2-s2.0-85028578169ISBN: 9781538631669 OAI: oai:DiVA.org:kth-214376DiVA, id: diva2:1140382
Conference
12th IEEE International Symposium on Industrial Embedded Systems, SIES 2017, Ecole Nationale superieure d'Electrotechnique, d'Electronique, d'Informatique et des Telecommunications (INP-ENSEEIHT)Toulouse, France, 14 June 2017 through 16 June 2017
Note

QC 20170912

Available from: 2017-09-12 Created: 2017-09-12 Last updated: 2017-09-12Bibliographically approved

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CiteExportLink to record
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Citation style
  • apa
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