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Sparse iterative learning control with application to a wafer stage: Achieving performance, resource efficiency, and task flexibility
KTH, School of Electrical Engineering (EES), Automatic Control.ORCID iD: 0000-0003-0355-2663
2017 (English)In: Mechatronics (Oxford), ISSN 0957-4158, E-ISSN 1873-4006, Vol. 47, p. 134-147Article in journal (Refereed) Published
Abstract [en]

Trial-varying disturbances are a key concern in Iterative Learning Control (ILC) and may lead to inefficient and expensive implementations and severe performance deterioration. The aim of this paper is to develop a general framework for optimization-based ILC that allows for enforcing additional structure, including sparsity. The proposed method enforces sparsity in a generalized setting through convex relaxations using el norms. The proposed ILC framework is applied to the optimization of sampling sequences for resource efficient implementation, trial-varying disturbance attenuation, and basis function selection. The framework has a large potential in control applications such as mechatronics, as is confirmed through an application on a wafer stage. 

Place, publisher, year, edition, pages
PERGAMON-ELSEVIER SCIENCE LTD , 2017. Vol. 47, p. 134-147
Keywords [en]
Iterative learning control, Motion control, Feedforward, Sparse optimization, Resource-efficient control
National Category
Mechanical Engineering
Identifiers
URN: urn:nbn:se:kth:diva-217738DOI: 10.1016/j.mechatronics.2017.09.004ISI: 000414107500013Scopus ID: 2-s2.0-85030700202OAI: oai:DiVA.org:kth-217738DiVA, id: diva2:1159369
Note

QC 20171122

Available from: 2017-11-22 Created: 2017-11-22 Last updated: 2017-11-22Bibliographically approved

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Rojas, Cristian R.

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