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Gated base structure for improved current gain in SiC bipolar technology
KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.ORCID iD: 0000-0001-6459-749X
KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.
KTH, School of Information and Communication Technology (ICT).ORCID iD: 0000-0002-7510-9639
KTH, School of Information and Communication Technology (ICT), Electronics, Integrated devices and circuits.ORCID iD: 0000-0002-5845-3032
2017 (English)In: 2017 47th European Solid-State Device Research Conference (ESSDERC) 11-14 Sept. 2017, Editions Frontieres , 2017, p. 122-125Conference paper (Refereed)
Abstract [en]

Silicon Carbide (SiC) bipolar integrated circuits are a promising technology for extreme environment applications. SiC bipolar technology shows stable operation over a wide range of temperature. However, the current gain of the devices is suffering from high surface recombination, due to poor oxide passivation. In this paper we propose a gated base structure that offers improved current gain control. A polysilicon gate is formed on the passivation oxide on top of the base-link region. We investigate the current gain as a function of gate bias and temperature. A negative gate bias improves the gain at low collector current by more than 30% by suppressing the surface recombination. Measurements are presented at temperatures ranging from 300 K to 550 K and the gain is consistently improved. The proposed structure is also useful as a process monitor for the passivation oxide quality.

Place, publisher, year, edition, pages
Editions Frontieres , 2017. p. 122-125
Series
European Solid-State Device Research Conference, ISSN 1930-8876
Keywords [en]
bipolar, current gain, extreme enviroment, process monitor, silicon carbide (SiC), surface passivation, test structure
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-218127DOI: 10.1109/ESSDERC.2017.8066607Scopus ID: 2-s2.0-85033444950ISBN: 9781509059782 OAI: oai:DiVA.org:kth-218127DiVA, id: diva2:1159767
Conference
47th European Solid-State Device Research Conference, ESSDERC 2017, Leuven, Belgium, 11 September 2017 through 14 September 2017
Note

QC 20171123

Available from: 2017-11-23 Created: 2017-11-23 Last updated: 2017-11-23Bibliographically approved

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Malm, B. GunnarElahipanah, HosseinSalemi, ArashÖstling

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