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Improved interface and electrical properties of atomic layer deposited Al2O3/4H-SiC
KTH, School of Information and Communication Technology (ICT).
KTH, School of Information and Communication Technology (ICT). Experimental Physics Laboratories, National Centre for Physics, Quaid-i-Azam University, Islamabad, Pakistan.
KTH, School of Information and Communication Technology (ICT).
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2018 (English)In: Applied Surface Science, ISSN 0169-4332, E-ISSN 1873-5584, Vol. 433, p. 108-115Article in journal (Refereed) Published
Abstract [en]

In this paper we demonstrate a process optimization of atomic layer deposited Al2O3 on 4H-SiC resulting in an improved interface and electrical properties. For this purpose the samples have been treated with two pre deposition surface cleaning processes, namely CP1 and CP2. The former is a typical surface cleaning procedure used in SiC processing while the latter have an additional weak RCA1 cleaning step. In addition to the cleaning and deposition, the effects of post dielectric annealing (PDA) at various temperatures in N2O ambient have been investigated. Analyses by scanning electron microscopy show the presence of structural defects on the Al2O3 surface after annealing at 500 and 800 °C. These defects disappear after annealing at 1100 °C, possibly due to densification of the Al2O3 film. Interface analyses have been performed using X-ray photoelectron spectroscopy (XPS) and time-of-flight medium energy ion scattering (ToF MEIS). Both these measurements show the formation of an interfacial SiOx (0 < x < 2) layer for both the CP1 and CP2, displaying an increased thickness for higher temperatures. Furthermore, the quality of the sub-oxide interfacial layer was found to depend on the pre deposition cleaning. In conclusion, an improved interface with better electrical properties is shown for the CP2 sample annealed at 1100 °C, resulting in lower oxide charges, strongly reduced flatband voltage and leakage current, as well as higher breakdown voltage.

Place, publisher, year, edition, pages
Elsevier, 2018. Vol. 433, p. 108-115
Keyword [en]
4H-SiC, Al2O3, High-K dielectric, Interface trap densities, Annealing, Atomic layer deposition, Cleaning, Deposition, Optimization, Scanning electron microscopy, Silicon carbide, Surface cleaning, Surface defects, Atomic layer deposited, Interface analysis, Interface trap density, Medium energy ion scattering, Structural defect, Surface cleaning procedure, X ray photoelectron spectroscopy
National Category
Materials Engineering
Identifiers
URN: urn:nbn:se:kth:diva-223127DOI: 10.1016/j.apsusc.2017.10.006ISI: 000418883800014Scopus ID: 2-s2.0-85031746823OAI: oai:DiVA.org:kth-223127DiVA, id: diva2:1193514
Funder
Swedish Research Council, D0674701
Note

QC 20180327

Available from: 2018-03-27 Created: 2018-03-27 Last updated: 2018-04-11Bibliographically approved

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Suvanam, Sethu SavedaYazdi, Milad G.Linnarsson, Margareta K.Göthelid, MatsHallén, Anders

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Suvanam, Sethu SavedaUsman, M.Yazdi, Milad G.Linnarsson, Margareta K.Göthelid, MatsHallén, Anders
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