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NoC-based DNN Accelerator: A Future Design Paradigm
KTH, School of Electrical Engineering and Computer Science (EECS), Electronics, Electronic and embedded systems.
2019 (English)Conference paper, Published paper (Refereed)
Abstract [en]

Deep Neural Networks (DNN) have shown significant advantagesin many domains such as pattern recognition, prediction, and controloptimization. The edge computing demand in the Internet-of-Things era has motivated many kinds of computing platforms toaccelerate the DNN operations. The most common platforms areCPU, GPU, ASIC, and FPGA. However, these platforms suffer fromlow performance (i.e., CPU and GPU), large power consumption(i.e., CPU, GPU, ASIC, and FPGA), or low computational flexibilityat runtime (i.e., FPGA and ASIC). In this paper, we suggest theNoC-based DNN platform as a new accelerator design paradigm.The NoC-based designs can reduce the off-chip memory accessesthrough a flexible interconnect that facilitates data exchange betweenprocessing elements on the chip. We first comprehensivelyinvestigate conventional platforms and methodologies used in DNNcomputing. Then we study and analyze different design parametersto implement the NoC-based DNN accelerator. The presentedaccelerator is based on mesh topology, neuron clustering, randommapping, and XY-routing. The experimental results on LeNet, MobileNet,and VGG-16 models show the benefits of the NoC-basedDNN accelerator in reducing off-chip memory accesses and improvingruntime computational flexibility.

Place, publisher, year, edition, pages
2019.
Keywords [en]
Network-on-Chip (NoC), Deep Neural Network (DNN), CNN, RNN, Accelerators, Routing Algorithms, Mapping Algorithms, Neural Network Simulator
National Category
Embedded Systems Other Electrical Engineering, Electronic Engineering, Information Engineering
Research subject
Information and Communication Technology
Identifiers
URN: urn:nbn:se:kth:diva-255684DOI: 10.1145/3313231.3352376ISBN: 978-1-4503-6700-4 (print)OAI: oai:DiVA.org:kth-255684DiVA, id: diva2:1341252
Conference
International Symposium on Networks-on-Chip (NOCS'19)
Note

QC 20190819

Available from: 2019-08-08 Created: 2019-08-08 Last updated: 2019-08-19Bibliographically approved

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fulltext(2871 kB)69 downloads
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Ebrahimi, Masoumeh

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CiteExportLink to record
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Citation style
  • apa
  • harvard1
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  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
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  • Other locale
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Output format
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