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4H-SIC trench pMOSFETs for high-frequency CMOS inverters
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2019 (English)In: Silicon Carbide and Related Materials 2018, Trans Tech Publications Ltd , 2019, p. 837-840Conference paper, Published paper (Refereed)
Abstract [en]

Low-parasitic-capacitance 4H-SiC pMOSFETs were demonstrated for high-frequency CMOS inverters. In these pMOSFETs, device characteristics including parasitic capacitances (gate-source, gate-drain capacitance) were investigated and low parasitic capacitance was achieved by the trench gate structure.

Place, publisher, year, edition, pages
Trans Tech Publications Ltd , 2019. p. 837-840
Series
Materials Science Forum, ISSN 1662-9752 ; 963
Keywords [en]
4H-SiC, Harsh environment electronics, Overlapping capacitance, PMOSFET, Capacitance, CMOS integrated circuits, MOSFET devices, Device characteristics, Gate-drain capacitance, Harsh environment, High frequency HF, Parasitic capacitance, Trench gate structures, Silicon carbide
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-262430DOI: 10.4028/www.scientific.net/MSF.963.837Scopus ID: 2-s2.0-85071890235ISBN: 9783035713329 (print)OAI: oai:DiVA.org:kth-262430DiVA, id: diva2:1367489
Conference
12th European Conference on Silicon Carbide and Related Materials, ECSCRM 2018, 2-6 September 2018, Birmingham, United Kingdom
Note

QC 20191104

Available from: 2019-11-04 Created: 2019-11-04 Last updated: 2019-11-04Bibliographically approved

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Östling, MikaelZetterling, Carl-Mikael

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