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Reconfigurable Analog to Digital Converters for Low Power Wireless Applications
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
2008 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The commercialization of Marconi’s radio transmission and reception, along with the development of integrated circuits in the 1960’s have facilitated many new consumer products for wireless communication, where the mobile phones or handsets are one. These handsets started out as a portable phone, mounted in cars, and have with time added additional services as Short Message Service, and have today become a media center with global positioning, and high-speed internet connection. This has been possible with the use of multistandard radios, that can receive and transmit information using many different wireless communication standards. Many of these handsets have one dedicated integrated radio chain for each communication standard used, which results in a large and expensive integrated circuit for these modern handsets. The challenge of today is to make modern handsets cheaper, smaller, and lower in power consumption. The power consumption is an issue of particular importance since the capacity of the available power sources do not increase with the demands of the handsets. One proposed method to do this is to move towards Software Defined Radio, where software of the handset control a single reconfigurable radio, and set which communication standard that the handset is to use. In this way, the handset can be reconfigured to communicate in the most power or data efficient way, depending on the choice of the user. The area of the Software Defined Radio receiver is also smaller than the parallel chains that are implemented today, which reduces the cost of production. The Software Defined Radio receiver is very challenging to design, since there is a large number of wireless communication standards, sometimes even within the same frequency bands. This make the reception of a weak desired signal difficult, when there may be a strong interferer in the same frequency band. A key component in the Software Defined Radio receiver is the Analog to Digital Converter. The development of new wireless communication standards requires higher performance of the Analog to Digital Converter in the receiver. This performance is hard to achieve, when the power consumption should be low, and the area should be small, especially in the modern integrated circuit technologies.

This thesis put the development of the communication industry into a historical perspective, and gives a review of the fundamental development of wireless communication applications. The fundamental concepts and implementations of Analog to Digital Converters for multistandard wireless receiver chains are also covered. Finally two case studies on the design of multistandard Analog to Digital Converters for Software Defined Radio applications are presented. These Analog to Digital Converters implement different methods of reconfiguration in order to comply with the requirements of the standards. The first case study is to the knowledge of the author the first reported reconfigurable Analog to Digital Converter for Wireless Personal Area Networks, that can be reconfigured from Bluetooth to the UWB communication standard. This is done by changing the architecture of the Analog to Digital Converter from Sigma Delta type to flash type. This reconfigurable Analog to Digital Converter is implemented at transistor level. The second case study investigates the limits of circuit level reconfigurability in an algorithmic Analog to Digital Converter. It is found that the requirements of two wireless communication standards can be covered with the use of smart circuit design techniques. The performance of this Analog to Digital Converter has been validated with experimental measurements.

Place, publisher, year, edition, pages
Stockholm: KTH , 2008. , xvi, 135 p.
Series
Trita-ICT-ECS AVH, ISSN 1653-6363 ; 08:04
Keyword [en]
Integrated Circuits, Analog to Digital Converters, Wireless communication, Electronics Engineering, Electrical Engineering
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-4774ISBN: 978-91-7178-932-7 (print)OAI: oai:DiVA.org:kth-4774DiVA: diva2:13880
Public defence
2008-06-02, N1, Electrum 3, Isafjordsgatan 29, Kista, 15:00 (English)
Opponent
Supervisors
Note
QC 20100729Available from: 2008-05-27 Created: 2008-05-27 Last updated: 2010-07-29Bibliographically approved
List of papers
1. Systematic design of a flash ADC for UWB applications
Open this publication in new window or tab >>Systematic design of a flash ADC for UWB applications
2007 (English)In: 8th International Symposium on Quality Electronic Design, ISQED 2007: San Jose, CA; 26 March 2007 through 28 March 2007, 2007, 108-112 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents the systematic design of a 5-bit, 1.2 GSPS interpolative flash ADC for multiband OFDM UWB applications. The proposed ADC architecture employs the proven capacitive interpolation, which greatly reduce the power consumption, by eliminating the need of a power hungry resistive ladder The flash ADC has been implemented in a 0.18 um CMOS process. Circuit level simulations show that the proposed architecture can achieve an SNDR of 25.3 dB, and an SFDR of 29.3 dB, with an input signal frequency of 330 MHz, at a sampling rate of 1.2 GSPS. The ADC core dissipates 130 mW from a 1.8 V supply.

National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-14264 (URN)10.1109/ISQED.2007.155 (DOI)000246368000016 ()2-s2.0-34548138863 (Scopus ID)978-0-7695-2795-6 (ISBN)
Note
QC 20100729Available from: 2010-07-29 Created: 2010-07-29 Last updated: 2013-01-29Bibliographically approved
2. Flexible ADCs for wireless mobile radios
Open this publication in new window or tab >>Flexible ADCs for wireless mobile radios
2007 (English)In: 18th European Conference on Circuit Theory Design, ECCTD 2007: Univ Sevilla, Seville, SPAIN, AUG 26-30, 2007, 2007, 172-175 p.Conference paper, Published paper (Refereed)
Abstract [en]

The evolution of wireless mobile devices calls for "all-in-one-device", which support a large number of wireless standards and allows wireless connectivity and roaming. This creates the need for adaptive circuits that are able to reconfigure themselves to trade-off power dissipation for performance, depending on the wireless standard to be supported and the required Quality of Service. Therefore, the key features of such mobile devices are flexibility and adaptability. This paper presents the ADCs suitable for mobile radios, keeping focus on flexible architectures. Finally, a programmable ADCs array, which can digitize signal bands from cellular to UWB is presented.

Keyword
Circuit theory; Ketones; Mobile devices; Networks (circuits); Portable equipment; Power quality; Standards; Telecommunication equipment; Telecommunication systems; Adaptive circuits; Circuit theory and design; European; Flexible architectures; Mobile radios; Power dissipations; Wireless Connectivity; Wireless mobile devices; Wireless standards
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-14267 (URN)10.1109/ECCTD.2007.4529564 (DOI)000258708400044 ()2-s2.0-49749088713 (Scopus ID)978-1-4244-1341-6 (ISBN)
Note
QC 20100729Available from: 2010-07-29 Created: 2010-07-29 Last updated: 2010-07-29Bibliographically approved
3. Behavioral modeling of a programmable UWB/Bluetooth ADC
Open this publication in new window or tab >>Behavioral modeling of a programmable UWB/Bluetooth ADC
2007 (English)In: 14th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2007: Marrakech; 11 December 2007 through 14 December 2007, 2007, 1159-1162 p.Conference paper, Published paper (Other academic)
Abstract [en]

This paper presents the system level design of a programmable ADC that can cover the bandwidth-accuracy space of UWB and Bluetooth standards by employing a capacitive interpolation flash ADC and a sigma-delta ADC. The system level performance of the ADC architectures has been evaluated, and circuit level specifications have been established, considering the most critical circuit non-idealities. The behavioral simulation results show that the ADC can achieve 30 dB SINAD at 528 MSPS in UWB mode, and 86 dB SINAD at 1 MSPS in Bluetooth mode.

Series
IEEE International Conference on Electronics, Circuits and Systems
Keyword
ADC, UWB, Bluetooth, CMOS, reconfigurable
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-14268 (URN)10.1109/ICECS.2007.4511201 (DOI)000255014801110 ()2-s2.0-50649122054 (Scopus ID)978-1-4244-1377-5 (ISBN)
Note
QC 20100729Available from: 2010-07-29 Created: 2010-07-29 Last updated: 2010-07-29Bibliographically approved
4. Systematic design of a high-speed capacitive interpolative flash ADC
Open this publication in new window or tab >>Systematic design of a high-speed capacitive interpolative flash ADC
2007 (English)Report (Other academic)
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-14271 (URN)
Note
QC 20100729Available from: 2010-07-29 Created: 2010-07-29 Last updated: 2012-01-25Bibliographically approved
5. Design of a Reconfigurable ADC for UWB/Bluetooth Radios
Open this publication in new window or tab >>Design of a Reconfigurable ADC for UWB/Bluetooth Radios
2008 (English)In: 2008 Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, NEWCAS-TAISA: Montreal, QC; 22 June 2008 through 25 June 2008, New York: IEEE , 2008, 205-208 p.Conference paper, Published paper (Refereed)
Abstract [en]

This paper presents the circuit implementation of a reconfigurable Analog to Digital Converter (ADC) for UWB and Bluetooth communication standards for mobile terminals. The bandwidth accuracy space is covered through smart configuration of a flexible capacitive interpolation ADC, used as stand-alone in UWB mode and as quantizer of a Sigma Delta ADC in Bluetooth mode. The ADC has been accurately modeled in Matlab/Simulink and then implemented at transistor level in a 180 nm CMOS process in the Cadence environment. The simulation results indicate that the ADC can achieve 30 dB SINAD at 528 MSPS in UWB mode, and 60 dB SINAD at 1 MSPS in Bluetooth mode.

Place, publisher, year, edition, pages
New York: IEEE, 2008
Keyword
Analog to digital conversion; Cellular telephone systems; CMOS integrated circuits; Multicarrier modulation; Networks (circuits); Standards; Telecommunication systems; Wireless telecommunication systems; Analog-to-digital converter; Bluetooth communications; Bluetooth mode; Capacitive interpolation; Circuit implementations; CMOS processing; MATLAB /simulink; Mobile terminals; Quantizer; Re-configurable; Sigma-delta; Simulation results; Transistor levels
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-14273 (URN)10.1109/NEWCAS.2008.4606357 (DOI)000262463700052 ()2-s2.0-52449093637 (Scopus ID)978-1-4244-2331-6 (ISBN)
Conference
Joint IEEE North-East Workshop on Circuits and Systems/TAISA Conference Montreal, CANADA, JUN 22-25, 2008
Note
QC 20100729. Tidigare titel: Design of a Reconfigurable ADC for UWB/BT RadiosAvailable from: 2010-07-29 Created: 2010-07-29 Last updated: 2011-04-04Bibliographically approved
6. A flexible algorithmic ADC for wireless sensor nodes
Open this publication in new window or tab >>A flexible algorithmic ADC for wireless sensor nodes
Show others...
2008 (English)In: Proceedings of the 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008: St. Julian's; 31 August 2008 through 3 September 2008, 2008, 1213-1216 p.Conference paper, Published paper (Refereed)
Keyword
Bluetooth; Cellular telephone systems; Code division multiple access; Dispensers; Electric network synthesis; Networks (circuits); Sensors; Telecommunication equipment; Behavioral levels; Behavioral models; Behavioral simulations; CDMA2000; Circuit implementations; Circuit non-idealities; CMOS processes; Dynamic ranges; Optimal designs; Resolution sensors; Sampling rates; Sensor applications; Transistor levels; Wireless sensor nodes
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-14276 (URN)10.1109/ICECS.2008.4675077 (DOI)2-s2.0-57849163751 (Scopus ID)978-142442182-4 (ISBN)
Note
QC 20100729Available from: 2010-07-29 Created: 2010-07-29 Last updated: 2010-07-29Bibliographically approved
7. A programmable algorithmic ADC for low-power wireless applications
Open this publication in new window or tab >>A programmable algorithmic ADC for low-power wireless applications
Show others...
2008 (English)Report (Other academic)
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-14279 (URN)
Note

QC 20100729

Available from: 2010-07-29 Created: 2010-07-29 Last updated: 2015-09-15Bibliographically approved

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Citation style
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Output format
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