We report the design, fabrication, and characterization of silicon heterojunction microcells, a new type of photovoltaic cell that leverages high-efficiency bulk wafers in a microscale form factor, while also addressing the challenge of passivating microcell sidewalls to mitigate carrier recombination. We present synthesis methods exploiting either dry etching or laser cutting to realize microcells with native oxide-based edge passivation. Measured microcell performance for both fabrication processes is compared to that in simulations. We characterize the dependence of microcell open-circuit voltage (V-oc) on the cell area-perimeter ratio and examine synthesis processes that affect edge passivation quality, such as sidewall damage removal, the passivation material, and the deposition technique. We report the highest Si microcell V-oc to date (588 mV, for a 400 mu m x 400 mu m x 80 mu m device), demonstrate V-oc improvements with deposited edge passivation of up to 55 mV, and outline a pathway to achieve microcell efficiencies surpassing 15% for such device sizes.