Fully depleted silicon-on-insulator (FDSOI) CMOS with thick buried oxide (BOX) can operate at higher temperatures compared to bulk CMOS. This work demonstrates, both experimentally and through simulations, that the subthreshold characteristics (off-state leakage current, beak and subthreshold swing, SS) are greatly improved at high temperatures by reducing the Si thickness (t(si)) in FDSOI CMOS. Fabricated N and PFET devices exhibit low I-leak < 300 pA/mu m and close to ideal subthreshold swing (SS<132 mV/dec) at 300 degrees C. TCAD simulations closely match measured data and show that electrostatic control of the Si layer is key to achieve close to ideal SS and low I-leak. With proper gate electrodes FDSOI CMOS can achieve an I-off< 1nA/mu m at 300 degrees C for both P and NFETs. This result shows that FDSOI CMOS can find use as low power control logic at high temperatures.