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Reactive and Risk-Aware Control for Signal Temporal Logic
Department of Electrical and Systems Engineering, University of Pennsylvania, Philadelphia, United States of America.
Department of Electrical and Systems Engineering, University of Pennsylvania, Philadelphia, United States of America.
KTH, School of Electrical Engineering and Computer Science (EECS), Intelligent systems, Decision and Control Systems (Automatic Control).ORCID iD: 0000-0001-7309-8086
2022 (English)In: IEEE Transactions on Automatic Control, ISSN 0018-9286, E-ISSN 1558-2523, Vol. 67, no 10, p. 5262-5277Article in journal (Refereed) Published
Abstract [en]

The deployment of autonomous systems in uncertain and dynamic environments has raised fundamental questions. Addressing these is pivotal to build fully autonomous systems and requires a systematic integration of planning and control. We first propose reactive risk signal interval temporal logic (ReRiSITL) as an extension of signal temporal logic (STL) to formulate complex spatiotemporal specifications. Unlike STL, ReRiSITL allows to consider uncontrollable propositions that may model humans as well as random environmental events such as sensor failures. Additionally, ReRiSITL allows to incorporate risk measures, such as (but not limited to) the Conditional Value-at-Risk, to measure the risk of violating certain spatial specifications. Second, we propose an algorithm to check if an ReRiSITL specification is satisfiable. For this purpose, we abstract the ReRiSITL specification into a timed signal transducer and devise a game-based approach. Third, we propose a reactive planning and control framework for dynamical control systems under ReRiSITL specifications.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE) , 2022. Vol. 67, no 10, p. 5262-5277
Keywords [en]
Automata, Control systems, Formal Methods, Planning, Random variables, Reactive Control, Reactive power, Riskaware Control, Semantics, Signal Temporal Logic, Timed Automata, Transducers, Automata theory, Computer circuits, Model checking, Risk assessment, Value engineering, Automaton, Interval temporal logic, Planning and control, Risk aware, Risk signals, Temporal logic specifications, Temporal logic
National Category
Fluid Mechanics
Identifiers
URN: urn:nbn:se:kth:diva-312950DOI: 10.1109/TAC.2021.3120681ISI: 000861438100020Scopus ID: 2-s2.0-85117753536OAI: oai:DiVA.org:kth-312950DiVA, id: diva2:1661189
Note

QC 20250326

Available from: 2022-05-25 Created: 2022-05-25 Last updated: 2025-03-26Bibliographically approved

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Dimarogonas, Dimos V.

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