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Formally Verified Isolation of DMA
KTH, School of Electrical Engineering and Computer Science (EECS), Computer Science, Theoretical Computer Science, TCS.ORCID iD: 0000-0001-7293-5735
KTH, School of Electrical Engineering and Computer Science (EECS), Computer Science, Theoretical Computer Science, TCS.ORCID iD: 0000-0002-8069-6495
2022 (English)In: Proceedings of the 22nd Conference on Formal Methods in Computer-Aided Design – FMCAD 2022 / [ed] Alberto Griggio / Neha Rungta, Vienna, 2022Conference paper, Published paper (Refereed)
Abstract [en]

Every computer having a network, USB or disk controller has a Direct Memory Access Controller (DMAC) which is configured by a driver to transfer data between the device and main memory. The DMAC, if wrongly configured, can therefore potentially leak sensitive data and overwrite critical memory to overtake the system. Since DMAC drivers tend to be buggy (due to their complexity), these attacks are a serious threat.

This paper presents a general formal framework for modeling DMACs and verifying under which conditions they are isolated. These conditions can be used as a specification for guaranteeing that a driver configures the DMAC correctly. The framework provides general isolation theorems that are common to all DMACs, leaving to the user only the task of verifying proof obligations that are DMAC specific. This provides a reusable verification infrastructure that reduces the verification effort of DMACs. Models and proofs have been developed in the HOL4 interactive theorem prover. To demonstrate the usefulness of the framework, we instantiate it with a DMAC of a USB.

Place, publisher, year, edition, pages
Vienna, 2022.
Series
Formal Methods in Computer-Aided Design
Keywords [en]
Formal verification, interactive theorem proving, DMA, I/O security, memory isolation
National Category
Computer Systems
Research subject
Computer Science
Identifiers
URN: urn:nbn:se:kth:diva-327292DOI: 10.34727/2022/isbn.978-3-85448-053-2_18ISI: 001062691400018Scopus ID: 2-s2.0-85148065913OAI: oai:DiVA.org:kth-327292DiVA, id: diva2:1758722
Conference
22nd Conference on Formal Methods in Computer-Aided Design – FMCAD 2022, Trento, Italy, October 17-21, 2022
Note

Part of proceedings ISBN 978-3-85448-053-2

QC 20230526

Available from: 2023-05-23 Created: 2023-05-23 Last updated: 2023-10-16Bibliographically approved
In thesis
1. Formal Verification of Peripheral Memory Isolation
Open this publication in new window or tab >>Formal Verification of Peripheral Memory Isolation
2023 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

In many contexts, computers run both critical and untrusted software,necessitating the need for isolating critical software from untrusted software.These computers contain CPUs, memory and peripherals. For performance reasons,some of these peripherals have a direct memory access (DMA) controller (DMAC),allowing them to access memory without involving the CPU.

This thesis is a study of memory isolation of peripherals. That is, howperipherals are configured such that they can access only restricted memoryregions. If DMACs are not configured appropriately, they may be able to read andleak sensitive data, or modify and corrupt sensitive data and critical programcode, with potentially disastrous consequences. Since DMACs are configured by anassociated DMAC driver software, the DMAC driver is a critical point for security.Testing drivers for isolation is infeasible, due to the necessity of exhaustivetesting to detect violating writes and differential testing to detect violatingreads. Therefore, we use formal methods and interactive theorem proving (ITP), todevelop formal conditions that, if satisfied by a driver, ensure that theassociated DMAC is memory isolated.

We present a detailed case study of formally verifying memory isolation of anEthernet DMAC in the ITP HOL4. We also generalize this case study in the form ofa verification tool in HOL4, reducing the complexity and time needed to formallyverify the conditions under which a DMAC is isolated. The tool includes ageneral DMAC model, reflecting the common features of DMACs. By means ofrefinement, we verified the conditions under which this general DMAC isisolated. By instantiating this general DMAC model with the specifics of a givenDMAC, and by proving the associated proof obligations, the user obtains theformal conditions for DMAC memory isolation.

In addition, we have implemented and analyzed a run-time monitor that checksthat Ethernet DMAC configurations respect memory isolation. This monitor is usedin a CCTV system, part of an isolation verified hypervisor, on top of whichLinux and a CCTV guest runs. This system gives Linux Internet access, butwithout being able to to obtain unencrypted photos taken by the CCTV guest: Thehypervisor configures the CPU such that Linux and the CCTV guest are isolated,except for a communication channel used to transfer encrypted photos; and themonitor applies only DMAC configurations, defined by Linux, that cannot causethe DMAC to access non-Linux memory.

Abstract [sv]

Många datorer exekverar både kritisk och opålitlig mjukvara. Detta gör det nödvändig att isolera dessa typer av mjukvara från varandra. Dessa datorer innehåller CPUer, minne och periferienheter. För att maximera prestanda så innehåller vissa periferienheter en minnesstyrkrets för direkt minnesåtkomst som gör att periferienheterna kan läsa och skriva minnet utan inblandning av CPUn.

Denna uppsats presenterar en studie av hur periferienheter kan konfigureras så att de är isolerade till vissa minnesregioner. Om minnesstyrkretsen inte är konfigurerad på rätt sätt så kan den möjligtvis läsa och läcka känslig data, eller skriva och förstöra känslig data och kritisk programkod, med förödande konsekvenser. En minnesstyrkrets konfigureras av en tillhörande drivrutin. För att begränsa styrkretsen till vissa minnesregioner så måste därför drivrutinen konfigurera styrkretsen på en motsvarande sätt. Detta gör att drivrutiner för minnesstyrkretsar har en kritisk roll i datorsäkerhet. Testning av drivrutiner för isolering är omöjligt på grund av det stora antalet nödvändiga testfall för att utesluta oönskade minnesåtkomster. Därför använder vi formella metoder och ett interaktivt bevisverktyg för att identifiera formella villkor som garanterar, om satisfierade av drivrutinen, att styrkretsen är minnesisolerad.

Vi presenterar en detaljerad formell verifiering i bevisverktyget HOL4 av att en minnesstyrkrets i en Ethernet-adapter är minnesisolerad. Vi generaliserar denna studie i form av ett verifieringsverktyg i HOL4, som reducerar arbetsbördan för att verifiera minnesisolering av minnesstyrkretsar. Verktyget inkluderar en generell model som beskriver de gemensamma operationerna som minnesstyrkretsar utför. Vi har utgått från en abstrakt och generell styrkretsmodell, och steg för steg lagt till mer detaljerade styrkretsoperationer och verifierat att den resulterande modellen respekterar minnesisolering, och slutligen erhållit verifiering av en konkret generell modell som beskriver riktiga minnesstyrkretsar. Genom att instantiera den generella styrkretsmodellen med specifika styrkretsoperationer, och bevisa vissa tillhörande förpliktelser, så erhåller användaren de formella isoleringsvillkoren.

Vi har också implementerat och analyserat en körtidsmonitor. Denna monitor kontrollerar att konfigurationer av en minnesstyrkrets i en Ethernet-adapter bevaras i ett minnesisolerat tillstånd. Denna monitor används i ett CCTV-system, som del av en hypervisor, som Linux och en CCTV-gäst exekveras ovanpå. I detta system har Linux internetåtkomst, men utan möjlighet att kunna erhålla okrypterade foton tagna av CCTV-gästen. Hypervisorn konfigurerar CPUn sådant att Linux och CCTV-gästen är isolerade, bortsett från en kommunikationskanal som används för att överföra krypterade foton mellan CCTV-gästen och Linux. Monitorn verkställer enbart styrkretskonfigurationer, konstruerade av Linux, som inte kan få styrkretsen att läsa eller skriva minne som inte tillhör Linux.

Place, publisher, year, edition, pages
Stockholm: KTH Royal Institute of Technology, 2023. p. 102
Series
TRITA-EECS-AVL ; 2013:48
Keywords
formal verification, interactive theorem proving, direct memory access, memory isolation, input/output, formell verifiering, interaktiv datorassisterad beviskonstruktion, direkt minnesåtkomst, minnesisolering, indata/utdata
National Category
Computer Systems
Research subject
Computer Science
Identifiers
urn:nbn:se:kth:diva-327312 (URN)978-91-8040-604-8 (ISBN)
Public defence
2023-06-14, https://kth-se.zoom.us/j/69872122832, D3 Lindstedtsvägen 9, Stockholm, 15:00 (English)
Opponent
Supervisors
Note

QC 20230523

Available from: 2023-05-24 Created: 2023-05-23 Last updated: 2023-06-13Bibliographically approved

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Haglund, JonasGuanciale, Roberto

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