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Q2Logic: A Coarse-Grained FPGA Overlay targeting Schrödinger Quantum Circuit Simulations
KTH, School of Electrical Engineering and Computer Science (EECS), Computer Science, Computational Science and Technology (CST).ORCID iD: 0000-0001-5452-6794
2023 (English)In: 2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023, Institute of Electrical and Electronics Engineers (IEEE) , 2023, p. 460-467Conference paper, Published paper (Refereed)
Abstract [en]

Quantum computing is emerging as an important (but radical) technology that might take us beyond Moore's law for certain applications. Today, in parallel with improving quantum computers, computer scientists are relying heavily on quantum circuit simulators to develop algorithms. Most existing quantum circuit simulators run on general-purpose CPUs or GPUs. However, at the same time, quantum circuits themselves offer multiple opportunities for parallelization, some of which could map better to other architecture- architectures such as reconfigurable systems. In this early work, we created a quantum circuit simulator system called Q2Logic. Q2Logic is a coarse-grained reconfigurable architecture (CGRA) implemented as an overlay on Field-Programmable Gate Arrays (FPGAs), but specialized towards quantum simulations. We described how Q2Logic has been created and reveal implementation details, limitations, and opportunities. We end the study by empirically comparing the performance of Q2Logic (running on a Intel Agilex FPGA) against the state-of-the-art framework SVSim (running on a modern processor), showing improvements in three large circuits(#qbit≥27), where Q2Logic can be up-to 7x faster.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE) , 2023. p. 460-467
Keywords [en]
CGRA, FPGA, Overlay, Quantum Simulation, State Vector
National Category
Computer Engineering Embedded Systems
Identifiers
URN: urn:nbn:se:kth:diva-336740DOI: 10.1109/IPDPSW59300.2023.00078ISI: 001055030700057Scopus ID: 2-s2.0-85169289891OAI: oai:DiVA.org:kth-336740DiVA, id: diva2:1798491
Conference
2023 IEEE International Parallel and Distributed Processing Symposium Workshops, IPDPSW 2023, St. Petersburg, United States of America, May 15 2023 - May 19 2023
Note

Part of ISBN 9798350311990

QC 20230919

Available from: 2023-09-19 Created: 2023-09-19 Last updated: 2023-10-02Bibliographically approved

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Podobas, Artur

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