kth.sePublications
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Design of Filter-Based Stabilizing Control for PLL-Synchronized Converters
Southeast Univ, Sch Elect Engn, Nanjing 210096, Peoples R China.
Southeast Univ, Sch Elect Engn, Nanjing 210096, Peoples R China.
Southeast Univ, Sch Elect Engn, Nanjing 210096, Peoples R China.
Univ Nottingham Ningbo China, Ningbo 315104, Peoples R China.
Show others and affiliations
2024 (English)In: IEEE Transactions on Industrial Electronics, ISSN 0278-0046, E-ISSN 1557-9948, Vol. 71, no 11, p. 14208-14219Article in journal (Refereed) Published
Abstract [en]

The phase-locked loop (PLL) has an important effect on the system stability of grid-connected converters in weak grids. In the literature, parameter tuning methods and stabilizing control strategies have been proposed to deal with this problem. However, most of them target at tuning parameters of PLL or mitigating the negative damping as well as the phase lag introduced by the PLL, while the interactions between the PLL and the current control and the cross coupling effects are still not fully explored in the design procedure of stabilizing control. To address this issue, this article extends the study of the interaction between the PLL and the current control using a multiple-input multiple-output (MIMO) model, and then proposes a design criterion of the stabilizing control using design-oriented analysis from the perspective of MIMO impedance model. A category of stabilizing control schemes that uses different types of biquad filters is proposed following the criterion, which not only improves system stability but also removes the coupling between the PLL and the current control according to the sensitivity analysis. Hardware-in-the-loop and experimental results are provided to verify the effectiveness of the proposed control schemes.

Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE) , 2024. Vol. 71, no 11, p. 14208-14219
Keywords [en]
Control design, phase-locked loop (PLL)-synchronized converter, PLL, sensitivity analysis, stability
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-345578DOI: 10.1109/TIE.2024.3374361ISI: 001193677300001Scopus ID: 2-s2.0-85188943181OAI: oai:DiVA.org:kth-345578DiVA, id: diva2:1851558
Note

QC 20240415

Available from: 2024-04-15 Created: 2024-04-15 Last updated: 2025-03-20Bibliographically approved

Open Access in DiVA

No full text in DiVA

Other links

Publisher's full textScopus

Authority records

Wang, Xiongfei

Search in DiVA

By author/editor
Wang, Xiongfei
By organisation
Electric Power and Energy Systems
In the same journal
IEEE Transactions on Industrial Electronics
Other Electrical Engineering, Electronic Engineering, Information Engineering

Search outside of DiVA

GoogleGoogle Scholar

doi
urn-nbn

Altmetric score

doi
urn-nbn
Total: 47 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf