kth.sePublications
Change search
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf
Updates to the Provet Compiler
KTH, School of Electrical Engineering and Computer Science (EECS).
2024 (English)Independent thesis Basic level (degree of Bachelor), 10 credits / 15 HE creditsStudent thesisAlternative title
Uppdateringar till provet-kompilatorn (Swedish)
Abstract [en]

This thesis addresses the enhancement of the compiler for the Provet soft-SIMD architecture, necessitated by significant updates to architecture design since the conception of the original compiler. The Provet architecture is a hardware accelerator capable of performing operations on multiple subwords simultaneously. The soft-SIMD nature of the processor allows runtime configurability of subword sizes, distinguishing it from traditional hard-SIMD architectures. The need for a specialized compiler to optimize parallel computation highlights the problem’s significance, particularly in rapidly advancing fields such as machine learning where data parallelism and computational demands continuously grow. To solve this problem, the project involved updating the compiler to accurately translate a restricted subset of C++ into efficient assembly code, as well as creating a model in C++ which emulates the behaviour of a Provet processor when it executes a program written in this restricted subset. The updated compiler was tested and showed correctness in translation. The results demonstrate that the enhanced compiler facilitates high-level applications by efficiently outsourcing computation to the Provet processor, leading to significant performance improvements in data-intensive tasks and expanding the practical applications of the Provet architecture in fields requiring robust parallel processing capabilities.

Abstract [sv]

Denna avhandling behandlar förbättringen av kompilatorn för Provet soft-SIMD-arkitekturen, nödvändiggjord av betydande uppdateringar av arkitekturdesignen sedan den ursprungliga kompilatorn skapades. Provet-arkitekturen är en hårdvaruaccelerator som kan utföra operationer på flera delord samtidigt. Processorns mjuk-SIMD-karaktär gör att storleken på delorden kan konfigureras under körning, vilket skiljer den från traditionella hård-SIMD-arkitekturer. Behovet av en specialiserad kompilator för att optimera parallella beräkningar understryker problemets betydelse, särskilt inom snabbt växande områden som maskininlärning där dataparallellism och beräkningskrav ständigt ökar. För att lösa detta problem omfattade projektet en uppdatering av kompilatorn för att korrekt översätta en begränsad delmängd av C++ till effektiv assemblerkod, samt att skapa en modell i C++ som emulerar beteendet hos en Provet-processor när den kör ett program skrivet i denna begränsade delmängd. Den uppdaterade kompilatorn testades och visade sig vara korrekt vid översättning. Resultaten visar att den förbättrade kompilatorn underlättar högnivåapplikationer genom att effektivt outsourca beräkningar till Provet-processorn, vilket leder till betydande prestandaförbättringar i dataintensiva uppgifter och utökar de praktiska tillämpningarna av Provet-arkitekturen inom områden som kräver robusta parallella bearbetningsmöjligheter.

Place, publisher, year, edition, pages
2024. , p. 62
Series
TRITA-EECS-EX ; 2024:690
Keywords [en]
Soft-SIMD, Compiler Design, Parallel Computation, Machine Learning
Keywords [sv]
Soft-SIMD, kompilatorkonstruktion, parallella beräkningar, maskininlärning
National Category
Computer and Information Sciences
Identifiers
URN: urn:nbn:se:kth:diva-356162OAI: oai:DiVA.org:kth-356162DiVA, id: diva2:1911813
Supervisors
Examiners
Available from: 2025-01-21 Created: 2024-11-08 Last updated: 2025-01-21Bibliographically approved

Open Access in DiVA

fulltext(1649 kB)34 downloads
File information
File name FULLTEXT01.pdfFile size 1649 kBChecksum SHA-512
ab452e679cac2737f141045f123757dba733f709bc30b1f95e93ec5c4720af84cc7d660602aba5615236bcd0075b6eea03bdd4d8981476ab0132ad2db108ca71
Type fulltextMimetype application/pdf

By organisation
School of Electrical Engineering and Computer Science (EECS)
Computer and Information Sciences

Search outside of DiVA

GoogleGoogle Scholar
Total: 34 downloads
The number of downloads is the sum of all downloads of full texts. It may include eg previous versions that are now no longer available

urn-nbn

Altmetric score

urn-nbn
Total: 552 hits
CiteExportLink to record
Permanent link

Direct link
Cite
Citation style
  • apa
  • ieee
  • modern-language-association-8th-edition
  • vancouver
  • Other style
More styles
Language
  • de-DE
  • en-GB
  • en-US
  • fi-FI
  • nn-NO
  • nn-NB
  • sv-SE
  • Other locale
More languages
Output format
  • html
  • text
  • asciidoc
  • rtf