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Determinism Enhancement in Embedded Systems for Aeronautics and Space applications
KTH, School of Electrical Engineering and Computer Science (EECS).
2025 (English)Independent thesis Advanced level (degree of Master (Two Years)), 20 credits / 30 HE creditsStudent thesisAlternative title
Förbättring av determinism i inbyggda system för flyg- och rymdapplikationer (Swedish)
Abstract [en]

Embedded systems in aeronautics and space applications require reliable and predictable performance to handle complex computations and real-time processing. Multi-Processing System-on-Chip (MPSoC) architectures like the Xilinx Zynq UltraScale+ (XZU+) MPSoC, which combine Processing Systems (PS) and Programmable Logic (PL), face significant challenges in achieving determinism due to interference in shared resources, particularly the DDR memory. This thesis explores methods to mitigate interference and improve Quality of Service (QoS) in the XZU+ MPSoC through optimized DDR Memory Controller (DDRMC) configurations. Techniques such as port-level isolation, command prioritization, and resource allocation are employed to minimize PS performance degradation, reduce variability across PL loads, and maintain acceptable PL service levels. Evaluations using metrics like relative performance reveal that tailored QoS setups enhance system predictability and stability, particularly under varying PL loads. The identified DDRMC QoS configuration successfully constrained interference to below 10% while maintaining PL performance. Future work will focus on incorporating cost and security considerations and expanding these QoS strategies to encompass a wider range of MPSoC platforms and deployment scenarios.

Abstract [sv]

Inbäddade system inom aeronautik och rymdtillämpningar kräver pålitlig och förutsägbar prestanda för att hantera komplexa beräkningar och re- altidsbearbetning. Multi-Processing System-on-Chip (MPSoC)-arkitekturer, såsom Xilinx Zynq UltraScale+ (XZU+) MPSoC, som kombinerar Processing Systems (PS) och Programmable Logic (PL), står inför betydande utmaningar med att uppnå determinism på grund av störningar i delade resurser, särskilt DDR-minnet. Denna avhandling undersöker metoder för att minska störningar och förbättra kvaliteten på tjänsten (QoS) i XZU+ MPSoC genom optimerade konfigurationer av DDR Memory Controller (DDRMC). Tekniker som portnivå-isolering, kommandoprioritering och resursallokering används för att minimera PS-prestandanedbrytning, minska variationen över PL-belastningar och upprätthålla acceptabla tjänstenivåer för PL. Utvärderingar med hjälp av metrik som relativ prestanda visar att skräddarsydda QoS-konfigurationer förbättrar systemets förutsägbarhet och stabilitet, särskilt under varierande PL- belastningar. Den identifierade DDRMC QoS-konfigurationen begränsade framgångs- rikt störningarna till under 10% samtidigt som PL-prestandan bibehölls. Framtida arbete kommer att fokusera på att integrera kostnads- och säkerhetsaspekter samt att utvidga dessa QoS-strategier till att omfatta ett bredare spektrum av MPSoC-plattformar och implementeringsscenarier.

Place, publisher, year, edition, pages
2025. , p. 84
Series
TRITA-EECS-EX ; 2025:67
Keywords [en]
Zynq UltraScale+, MPSoC, Interference Mitigation, Processing System, Programmable Logic, DDRMC, AXI, Quality of Service
Keywords [sv]
Zynq UltraScale+, MPSoC, Interferensreducering, Bearbetningssystem, Pro- grammerbar logik, AXI, DDRMC, Kvalitet på tjänst
National Category
Computer and Information Sciences
Identifiers
URN: urn:nbn:se:kth:diva-362111OAI: oai:DiVA.org:kth-362111DiVA, id: diva2:1950535
External cooperation
ISAE-SUPAERO
Supervisors
Examiners
Available from: 2025-04-11 Created: 2025-04-08 Last updated: 2025-04-11Bibliographically approved

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CiteExportLink to record
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