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Row/column addressing scheme for large electrostatic actuator MEMS switch arrays and optimization of the operational reliability by statistical analysis
KTH, School of Electrical Engineering (EES), Microsystem Technology.
KTH, School of Electrical Engineering (EES), Microsystem Technology.
KTH, School of Electrical Engineering (EES), Microsystem Technology.ORCID iD: 0000-0001-9552-4234
2008 (English)In: Journal of microelectromechanical systems, ISSN 1057-7157, E-ISSN 1941-0158, Vol. 17, no 5, 1104-1113 p.Article in journal (Refereed) Published
Abstract [en]

This paper investigates the design and optimization of a row/column addressing scheme to individually pull in or pull out single electrostatic actuators in an N(2) array, utilizing the electromechanical hysteresis behavior of electrostatic actuators and efficiently reducing the number of necessary control lines from N(2) complexity to 2N. This paper illustrates the principle of the row/column addressing scheme. Furthermore, it investigates the optimal addressing voltages to individually pull in or pull out single actuators with maximum operational reliability, determined by the statistical parameters of the pull-in and pull-out characteristics of the actuators. The investigated addressing scheme is implemented for the individual addressing of cross-connect switches in a microelectromechanical systems 20 x 20 switch array, which is utilized for the automated any-to-any interconnection of 20 input signal line pairs to 20 output signal line pairs. The investigated addressing scheme and the presented calculations were successfully tested on electrostatic actuators in a fabricated 20 x 20 array. The actuation voltages and their statistical variations were characterized for different subarray cluster sizes. Finally, the addressing voltages were calculated and verified by tests, resulting in an operational reliability of 99.9498% (502 parts per million (ppm) failure rate) for a 20 x 20 switch array and of 99.99982% (1.75 ppm failure rate) for a 3 x 3 subarray cluster. The array operates by ac-actuation voltage to minimize the disturbing effects by dielectric charging of the actuator isolation layers, as observed in this paper for dc-actuation voltages.

Place, publisher, year, edition, pages
2008. Vol. 17, no 5, 1104-1113 p.
Keyword [en]
Addressing, electrostatic actuator, microelectromechanical systems (MEMS) switch, switch array
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-11832DOI: 10.1109/JMEMS.2008.928710ISI: 000260464800005Scopus ID: 2-s2.0-53649109514OAI: oai:DiVA.org:kth-11832DiVA: diva2:284103
Note
QC 20100729Available from: 2010-01-04 Created: 2010-01-04 Last updated: 2017-12-12Bibliographically approved
In thesis
1. Wafer-level heterogeneous integration of MEMS actuators
Open this publication in new window or tab >>Wafer-level heterogeneous integration of MEMS actuators
2010 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

This thesis presents methods for the wafer-level integration of shape memory alloy (SMA) and electrostatic actuators to functionalize MEMS devices. The integration methods are based on heterogeneous integration, which is the integration of different materials and technologies. Background information about the actuators and the integration method is provided.

SMA microactuators offer the highest work density of all MEMS actuators, however, they are not yet a standard MEMS material, partially due to the lack of proper wafer-level integration methods. This thesis presents methods for the wafer-level heterogeneous integration of bulk SMA sheets and wires with silicon microstructures. First concepts and experiments are presented for integrating SMA actuators with knife gate microvalves, which are introduced in this thesis. These microvalves feature a gate moving out-of-plane to regulate a gas flow and first measurements indicate outstanding pneumatic performance in relation to the consumed silicon footprint area. This part of the work also includes a novel technique for the footprint and thickness independent selective release of Au-Si eutectically bonded microstructures based on localized electrochemical etching.

Electrostatic actuators are presented to functionalize MEMS crossbar switches, which are intended for the automated reconfiguration of copper-wire telecommunication networks and must allow to interconnect a number of input lines to a number of output lines in any combination desired. Following the concepts of heterogeneous integration, the device is divided into two parts which are fabricated separately and then assembled. One part contains an array of double-pole single-throw S-shaped actuator MEMS switches. The other part contains a signal line routing network which is interconnected by the switches after assembly of the two parts. The assembly is based on patterned adhesive wafer bonding and results in wafer-level encapsulation of the switch array. During operation, the switches in these arrays must be individually addressable. Instead of controlling each element with individual control lines, this thesis investigates a row/column addressing scheme to individually pull in or pull out single electrostatic actuators in the array with maximum operational reliability, determined by the statistical parameters of the pull-in and pull-out characteristics of the actuators.

Place, publisher, year, edition, pages
Stockholm: KTH, 2010. xii, 78 p.
Series
Trita-EE, ISSN 1653-5146 ; 2010:002
Keyword
Microelectromechanical systems, MEMS, silicon, wafer-level, integration, heterogeneous integration, transfer integration, packaging, assembly, wafer bonding, adhesive bonding, eutectic bonding, release etching, electrochemical etching, microvalves, microactuator, Shape Memory Alloy, SMA, NITINOL, TiNi, NiTi, cold-state reset, bias spring, stress layers, crossbar switch, routing, switch, switch array, electrostatic actuator, S-shaped actuator, zipper actuator, addressing, transfer stamping, blue tape
National Category
Computer Engineering
Identifiers
urn:nbn:se:kth:diva-11833 (URN)978-91-7415-493-1 (ISBN)
Public defence
2010-02-05, Lecture Hall F3, Lindstedtsvägen 26, KTH, Stockholm, 10:00 (English)
Opponent
Supervisors
Note
QC20100729Available from: 2010-01-12 Created: 2010-01-04 Last updated: 2010-07-29Bibliographically approved

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