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Wafer-level heterogeneous integration of MEMS actuators
KTH, School of Electrical Engineering (EES), Microsystem Technology.
2010 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

This thesis presents methods for the wafer-level integration of shape memory alloy (SMA) and electrostatic actuators to functionalize MEMS devices. The integration methods are based on heterogeneous integration, which is the integration of different materials and technologies. Background information about the actuators and the integration method is provided.

SMA microactuators offer the highest work density of all MEMS actuators, however, they are not yet a standard MEMS material, partially due to the lack of proper wafer-level integration methods. This thesis presents methods for the wafer-level heterogeneous integration of bulk SMA sheets and wires with silicon microstructures. First concepts and experiments are presented for integrating SMA actuators with knife gate microvalves, which are introduced in this thesis. These microvalves feature a gate moving out-of-plane to regulate a gas flow and first measurements indicate outstanding pneumatic performance in relation to the consumed silicon footprint area. This part of the work also includes a novel technique for the footprint and thickness independent selective release of Au-Si eutectically bonded microstructures based on localized electrochemical etching.

Electrostatic actuators are presented to functionalize MEMS crossbar switches, which are intended for the automated reconfiguration of copper-wire telecommunication networks and must allow to interconnect a number of input lines to a number of output lines in any combination desired. Following the concepts of heterogeneous integration, the device is divided into two parts which are fabricated separately and then assembled. One part contains an array of double-pole single-throw S-shaped actuator MEMS switches. The other part contains a signal line routing network which is interconnected by the switches after assembly of the two parts. The assembly is based on patterned adhesive wafer bonding and results in wafer-level encapsulation of the switch array. During operation, the switches in these arrays must be individually addressable. Instead of controlling each element with individual control lines, this thesis investigates a row/column addressing scheme to individually pull in or pull out single electrostatic actuators in the array with maximum operational reliability, determined by the statistical parameters of the pull-in and pull-out characteristics of the actuators.

Place, publisher, year, edition, pages
Stockholm: KTH , 2010. , xii, 78 p.
Series
Trita-EE, ISSN 1653-5146 ; 2010:002
Keyword [en]
Microelectromechanical systems, MEMS, silicon, wafer-level, integration, heterogeneous integration, transfer integration, packaging, assembly, wafer bonding, adhesive bonding, eutectic bonding, release etching, electrochemical etching, microvalves, microactuator, Shape Memory Alloy, SMA, NITINOL, TiNi, NiTi, cold-state reset, bias spring, stress layers, crossbar switch, routing, switch, switch array, electrostatic actuator, S-shaped actuator, zipper actuator, addressing, transfer stamping, blue tape
National Category
Computer Engineering
Identifiers
URN: urn:nbn:se:kth:diva-11833ISBN: 978-91-7415-493-1 (print)OAI: oai:DiVA.org:kth-11833DiVA: diva2:284108
Public defence
2010-02-05, Lecture Hall F3, Lindstedtsvägen 26, KTH, Stockholm, 10:00 (English)
Opponent
Supervisors
Note
QC20100729Available from: 2010-01-12 Created: 2010-01-04 Last updated: 2010-07-29Bibliographically approved
List of papers
1. Out-of-Plane Knife-Gate Microvalves for Controlling Large Gas Flows
Open this publication in new window or tab >>Out-of-Plane Knife-Gate Microvalves for Controlling Large Gas Flows
Show others...
2006 (English)In: Journal of microelectromechanical systems, ISSN 1057-7157, E-ISSN 1941-0158, Vol. 15, no 5, 1281-1288 p.Article in journal (Refereed) Published
Abstract [en]

This paper considers design issues for microvalves for large gas flow control. It introduces out-of-plane knife-gate microvalves as a novel design concept and a proportional microvalve concept for pressure control applications. The design of three different actuator-gate configurations and first prototypes are presented. The first valve prototypes feature thermal silicon-aluminum bimorph actuators and the pressure-flow performance per chip area of the demonstrator valve presented is greatly increased using out-of-plane actuation and an out-of-plane orifice. The characterization of the actuators and of the pressure-flow performance is presented. The prototype valve allows for a flow change of Delta Q = 3.4 standard liters per minute (SLPM) at a pressure change of Delta P = 95 kPa (P-in = 196.3 kPa, P-out = 101.3 kPa) on an active chip area of only 2.3 x 3.7 mm(2).

Place, publisher, year, edition, pages
IEEE Press, 2006
Keyword
Engineering, Electrical & Electronic; Engineering, Mechanical
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-11827 (URN)10.1109/JMEMS.2006.880279 (DOI)000241410600027 ()2-s2.0-33749984576 (Scopus ID)
Note

QC20100727

Available from: 2010-01-04 Created: 2010-01-04 Last updated: 2015-06-18Bibliographically approved
2. Wafer-Scale Manufacturing of Bulk Shape-Memory-Alloy Microactuators Based on Adhesive Bonding of Titanium-Nickel Sheets to Structured Silicon Wafers
Open this publication in new window or tab >>Wafer-Scale Manufacturing of Bulk Shape-Memory-Alloy Microactuators Based on Adhesive Bonding of Titanium-Nickel Sheets to Structured Silicon Wafers
2009 (English)In: Journal of microelectromechanical systems, ISSN 1057-7157, E-ISSN 1941-0158, Vol. 18, no 6, 1309-1317 p.Article in journal (Refereed) Published
Abstract [en]

This paper presents a concept for the wafer-scale manufacturing of microactuators based on the adhesive bonding of bulk shape-memory-alloy (SMA) sheets to silicon microstructures. Wafer-scale integration of a cold-state deformation mechanism is provided by the deposition of stressed films onto the SMA sheet. A concept for heating of the SMA by Joule heating through a resistive heater layer is presented. Critical fabrication issues were investigated, including the cold-state deformation, the bonding scheme and related stresses, and the titanium-nickel (TiNi) sheet patterning. Novel methods for the transfer stamping of adhesive and for the handling of the thin TiNi sheets were developed, based on the use of standard dicing blue tape. First demonstrator TiNi cantilevers, wafer-level adhesively bonded on a microstructured silicon substrate, were successfully fabricated and evaluated. Intrinsically stressed silicon dioxide and silicon nitride were deposited using plasma-enhanced chemical vapor deposition to deform the cantilevers in the cold state. Tip deflections for 2.5-mm-long cantilevers in cold/hot state of 250/70 and 125/28 mu m were obtained using silicon dioxide and silicon nitride, respectively. The bond strength proved to be stronger than the force created by the 2.5-mm-long TiNi cantilever and showed no degradation after more than 700 temperature cycles. The shape-memory behavior of the TiNi is maintained during the integration process.

Keyword
STRESS HYSTERESIS; HYBRID-COMPOSITES; DIELECTRIC FILMS; SMART SYSTEMS; PART II; MICROVALVES; MEMS
National Category
Nano Technology
Identifiers
urn:nbn:se:kth:diva-11828 (URN)10.1109/jmems.2009.2035368 (DOI)000272318900016 ()2-s2.0-71549169015 (Scopus ID)
Note

QC20100727

Available from: 2010-01-04 Created: 2010-01-04 Last updated: 2015-09-30Bibliographically approved
3. Design and wafer-level fabrication of SMA wire microactuators on silicon
Open this publication in new window or tab >>Design and wafer-level fabrication of SMA wire microactuators on silicon
Show others...
2010 (English)In: Journal of microelectromechanical systems, ISSN 1057-7157, E-ISSN 1941-0158, Vol. 19, no 4, 982-991 p.Article in journal (Refereed) Published
Abstract [en]

This paper reports on the fabrication of microactuators through wafer-level integration of prestrained shape memory alloy wires to silicon structures. In contrast to previous work, the wires are strained under pure tension, and the cold-state reset is provided by single-crystalline silicon cantilevers. The fabrication is based on standard microelectromechanical systems manufacturing technologies, and it enables an actuation scheme featuring high work densities. A mathematical model is discussed, which provides a useful approximation for practical designs and allows analyzing the actuators performance. Prototypes have been tested, and the influence of constructive variations on the actuator behavior is theoretically and experimentally evaluated. The test results are in close agreement with the calculated values, and they show that the actuators feature displacements that are among the highest reported.

Place, publisher, year, edition, pages
IEEE Press, 2010
Keyword
Actuator, adhesive bonding, bias spring, cantilever, microelectromechanical systems (MEMS), NiTi, reset mechanism, shape memory alloy (SMA), silicon structure, SU-8, TiNi, wafer-level integration
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-11829 (URN)10.1109/JMEMS.2010.2049474 (DOI)000283543400029 ()2-s2.0-77955414734 (Scopus ID)
Note

QC 20100729 Uppdaterad från accepted till published (20110217)

Available from: 2010-01-04 Created: 2010-01-04 Last updated: 2015-06-18Bibliographically approved
4. Localized removal of the Au-Si eutectic bonding layer for the selective release of microstructures
Open this publication in new window or tab >>Localized removal of the Au-Si eutectic bonding layer for the selective release of microstructures
2009 (English)In: Journal of Micromechanics and Microengineering, ISSN 0960-1317, E-ISSN 1361-6439, Vol. 19, no 10, 105014-105023 p.Article in journal (Refereed) Published
Abstract [en]

This paper presents and investigates a novel technique for the footprint and thickness-independent selective release of Au–Si eutectically bonded microstructures through the localized removal of their eutectic bond interface. The technique is based on the electrochemical removal of the gold in the eutectic layer and the selectivity is provided by patterning the eutectic layer and by proper electrical connection or isolation of the areas to be etched or removed, respectively. The gold removal results in a porous silicon layer, acting similar to standard etch holes in a subsequent sacrificial release etching. The paper presents the principle and the design requirements of the technique. First test devices were fabricated and the method successfully demonstrated. Furthermore, the paper investigates the release mechanism and the effects of different gold layouts on both the eutectic bonding and the release procedure.

Place, publisher, year, edition, pages
Institute of Physics (IOP), 2009
National Category
Mechanical Engineering
Identifiers
urn:nbn:se:kth:diva-11830 (URN)10.1088/0960-1317/19/10/105014 (DOI)000270133900014 ()2-s2.0-70350630503 (Scopus ID)
Note

QC20100729

Available from: 2010-01-04 Created: 2010-01-04 Last updated: 2015-06-18Bibliographically approved
5. Single-chip MEMS 5x5 and 20x20 double-pole single-throw switch arrays for automating telecommunication networks
Open this publication in new window or tab >>Single-chip MEMS 5x5 and 20x20 double-pole single-throw switch arrays for automating telecommunication networks
2008 (English)In: Journal of Micromechanics and Microengineering, ISSN 0960-1317, E-ISSN 1361-6439, Vol. 18, no 1, 015014- p.Article in journal (Refereed) Published
Abstract [en]

This paper reports on microelectromechanical (MEMS) switch arrays with 5 × 5 and 20 × 20 double-pole single-throw (DPST) switches embedded and packaged on a single chip, which are intended for automating main distribution frames in copper-wire telecommunication networks. Whenever a customer requests a change in his telecommunication services, the copper-wire network has to be reconfigured which is currently done manually by a costly physical re-routing of the connections in the main distribution frames. To reduce the costs, new methods for automating the network reconfiguration are sought after by the network providers. The presented devices comprise 5 × 5 or 20 × 20 double switches, which allow us to interconnect any of the 5 or 20 input lines to any of the 5 or 20 output lines. The switches are based on an electrostatic S-shaped film actuator with the switch contact on a flexible membrane, moving between a top and a bottom electrode. The devices are fabricated in two parts which are designed to be assembled using selective adhesive wafer bonding, resulting in a wafer-scale package of the switch array. The on-chip routing network consists of thick metal lines for low resistance and is embedded in bencocyclobutene (BCB) polymer layers. The packaged 5 × 5 switch arrays have a size of 6.7 × 6.4 mm2 and the 20 × 20 arrays are 14 × 10 mm2 large. The switch actuation voltages for closing/opening the switches averaged over an array were measured to be 21.2 V/15.3 V for the 5 × 5 array and 93.2 V/37.3 V for the 20 × 20 array, respectively. The total signal line resistances vary depending on the switch position within the array between 0.13 Ω and 0.56 Ω for the 5 × 5 array and between 0.08 Ω to 2.33 Ω for the 20 × 20 array, respectively. The average resistance of the switch contacts was determined to be 0.22 Ω with a standard deviation of 0.05 Ω.

National Category
Engineering and Technology
Identifiers
urn:nbn:se:kth:diva-11831 (URN)10.1088/0960-1317/18/1/015014 (DOI)000252965900016 ()2-s2.0-41849094441 (Scopus ID)
Note
QC 20100729Available from: 2010-01-04 Created: 2010-01-04 Last updated: 2011-11-07Bibliographically approved
6. Row/column addressing scheme for large electrostatic actuator MEMS switch arrays and optimization of the operational reliability by statistical analysis
Open this publication in new window or tab >>Row/column addressing scheme for large electrostatic actuator MEMS switch arrays and optimization of the operational reliability by statistical analysis
2008 (English)In: Journal of microelectromechanical systems, ISSN 1057-7157, E-ISSN 1941-0158, Vol. 17, no 5, 1104-1113 p.Article in journal (Refereed) Published
Abstract [en]

This paper investigates the design and optimization of a row/column addressing scheme to individually pull in or pull out single electrostatic actuators in an N(2) array, utilizing the electromechanical hysteresis behavior of electrostatic actuators and efficiently reducing the number of necessary control lines from N(2) complexity to 2N. This paper illustrates the principle of the row/column addressing scheme. Furthermore, it investigates the optimal addressing voltages to individually pull in or pull out single actuators with maximum operational reliability, determined by the statistical parameters of the pull-in and pull-out characteristics of the actuators. The investigated addressing scheme is implemented for the individual addressing of cross-connect switches in a microelectromechanical systems 20 x 20 switch array, which is utilized for the automated any-to-any interconnection of 20 input signal line pairs to 20 output signal line pairs. The investigated addressing scheme and the presented calculations were successfully tested on electrostatic actuators in a fabricated 20 x 20 array. The actuation voltages and their statistical variations were characterized for different subarray cluster sizes. Finally, the addressing voltages were calculated and verified by tests, resulting in an operational reliability of 99.9498% (502 parts per million (ppm) failure rate) for a 20 x 20 switch array and of 99.99982% (1.75 ppm failure rate) for a 3 x 3 subarray cluster. The array operates by ac-actuation voltage to minimize the disturbing effects by dielectric charging of the actuator isolation layers, as observed in this paper for dc-actuation voltages.

Keyword
Addressing, electrostatic actuator, microelectromechanical systems (MEMS) switch, switch array
National Category
Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-11832 (URN)10.1109/JMEMS.2008.928710 (DOI)000260464800005 ()2-s2.0-53649109514 (Scopus ID)
Note
QC 20100729Available from: 2010-01-04 Created: 2010-01-04 Last updated: 2011-11-08Bibliographically approved

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