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Systematic design of a high-speed capacitive interpolative flash ADC
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.ORCID iD: 0000-0003-3802-7834
KTH, School of Information and Communication Technology (ICT), Electronic, Computer and Software Systems, ECS.
2007 (English)Report (Other academic)
Place, publisher, year, edition, pages
2007.
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
URN: urn:nbn:se:kth:diva-14271OAI: oai:DiVA.org:kth-14271DiVA: diva2:331986
Note
QC 20100729Available from: 2010-07-29 Created: 2010-07-29 Last updated: 2012-01-25Bibliographically approved
In thesis
1. Reconfigurable Analog to Digital Converters for Low Power Wireless Applications
Open this publication in new window or tab >>Reconfigurable Analog to Digital Converters for Low Power Wireless Applications
2008 (English)Doctoral thesis, comprehensive summary (Other academic)
Abstract [en]

The commercialization of Marconi’s radio transmission and reception, along with the development of integrated circuits in the 1960’s have facilitated many new consumer products for wireless communication, where the mobile phones or handsets are one. These handsets started out as a portable phone, mounted in cars, and have with time added additional services as Short Message Service, and have today become a media center with global positioning, and high-speed internet connection. This has been possible with the use of multistandard radios, that can receive and transmit information using many different wireless communication standards. Many of these handsets have one dedicated integrated radio chain for each communication standard used, which results in a large and expensive integrated circuit for these modern handsets. The challenge of today is to make modern handsets cheaper, smaller, and lower in power consumption. The power consumption is an issue of particular importance since the capacity of the available power sources do not increase with the demands of the handsets. One proposed method to do this is to move towards Software Defined Radio, where software of the handset control a single reconfigurable radio, and set which communication standard that the handset is to use. In this way, the handset can be reconfigured to communicate in the most power or data efficient way, depending on the choice of the user. The area of the Software Defined Radio receiver is also smaller than the parallel chains that are implemented today, which reduces the cost of production. The Software Defined Radio receiver is very challenging to design, since there is a large number of wireless communication standards, sometimes even within the same frequency bands. This make the reception of a weak desired signal difficult, when there may be a strong interferer in the same frequency band. A key component in the Software Defined Radio receiver is the Analog to Digital Converter. The development of new wireless communication standards requires higher performance of the Analog to Digital Converter in the receiver. This performance is hard to achieve, when the power consumption should be low, and the area should be small, especially in the modern integrated circuit technologies.

This thesis put the development of the communication industry into a historical perspective, and gives a review of the fundamental development of wireless communication applications. The fundamental concepts and implementations of Analog to Digital Converters for multistandard wireless receiver chains are also covered. Finally two case studies on the design of multistandard Analog to Digital Converters for Software Defined Radio applications are presented. These Analog to Digital Converters implement different methods of reconfiguration in order to comply with the requirements of the standards. The first case study is to the knowledge of the author the first reported reconfigurable Analog to Digital Converter for Wireless Personal Area Networks, that can be reconfigured from Bluetooth to the UWB communication standard. This is done by changing the architecture of the Analog to Digital Converter from Sigma Delta type to flash type. This reconfigurable Analog to Digital Converter is implemented at transistor level. The second case study investigates the limits of circuit level reconfigurability in an algorithmic Analog to Digital Converter. It is found that the requirements of two wireless communication standards can be covered with the use of smart circuit design techniques. The performance of this Analog to Digital Converter has been validated with experimental measurements.

Place, publisher, year, edition, pages
Stockholm: KTH, 2008. xvi, 135 p.
Series
Trita-ICT-ECS AVH, ISSN 1653-6363 ; 08:04
Keyword
Integrated Circuits, Analog to Digital Converters, Wireless communication, Electronics Engineering, Electrical Engineering
National Category
Other Electrical Engineering, Electronic Engineering, Information Engineering
Identifiers
urn:nbn:se:kth:diva-4774 (URN)978-91-7178-932-7 (ISBN)
Public defence
2008-06-02, N1, Electrum 3, Isafjordsgatan 29, Kista, 15:00 (English)
Opponent
Supervisors
Note
QC 20100729Available from: 2008-05-27 Created: 2008-05-27 Last updated: 2010-07-29Bibliographically approved

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Rusu, Ana

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