A digital calibration algorithm for implementing accurate on-chip resistors
2006 (English)In: Analog Integrated Circuits and Signal Processing, ISSN 0925-1030, E-ISSN 1573-1979, Vol. 47, no 3, 259-272 p.Article in journal (Refereed) Published
A digital calibration algorithm that provides a systematic method for implementing accurate integrated resistors without compromising linearity or noise performance is described. The technique uses a single external resistor as a reference to implement multiple, different valued integrated resistors without requiring any accurate reference voltage. The algorithm provides a method to calibrate several on-chip resistors without replicating the calibration circuit, and it can achieve an arbitrary accuracy limited only by the external resistor's accuracy and mismatch errors. Terminations for two high speed wire line transceivers are implemented using the algorithm and simulations and measurements results show adequate performance across process, temperature, and supply voltage.
Place, publisher, year, edition, pages
2006. Vol. 47, no 3, 259-272 p.
calibration, circuit tuning, resistive circuits, adaptive codes, CMOS integrated circuits, transmission line, digital communication, floating resistor, cmos, voltage
IdentifiersURN: urn:nbn:se:kth:diva-15623DOI: 10.1007/s10470-006-5675-6ISI: 000236963400002OAI: oai:DiVA.org:kth-15623DiVA: diva2:333665
QC 201005252010-08-052010-08-05Bibliographically approved