Application and. verification of local nonsemantic-preserving transformations in system-design
2008 (English)In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ISSN 0278-0070, E-ISSN 1937-4151, Vol. 27, no 6, 1091-1103 p.Article in journal (Refereed) Published
Due to the increasing abstraction gap between the initial system model and a final implementation, the verification of the respective models against each other is a formidable task. This paper addresses the verification problem by proposing a stepwise application of combined refinement and verification activities in the context of synchronous model of computation. An implementation model is developed from the system model by applying pre-defined design transformations which are as follows: 1) semantic preserving or 2) nonsemantic preserving. Nonsemantic-preserving transformations introduce lower level implementation details, which are necessary to yield an efficient implementation. Our approach divides the verification tasks into two activities: 1) the local correctness of a refined block is checked by using formal verification tools and predefined properties, which are developed for each nonsemantic-preserving transformation, and 2) the global influence of the refinement to the entire system is studied through static analysis. We illustrate the design refinement and verification approach with three transformations: 1) a communication refinement mapping a synchronous channel to an asynchronous one including a handshake mechanism; 2) a computation refinement, which introduces resource sharing in a combinational computation block; and 3) a synchronization demanding refinement, where an algorithm analyzes the influence of a local refinement to the temporal properties of the entire system and restores the system's correct temporal behavior if necessary.
Place, publisher, year, edition, pages
Institute of Electrical and Electronics Engineers (IEEE), 2008. Vol. 27, no 6, 1091-1103 p.
Design refinement, Formal verification, Synchronization, System design
IdentifiersURN: urn:nbn:se:kth:diva-17555DOI: 10.1109/tcad.2008.923249ISI: 000256156400009ScopusID: 2-s2.0-44149107365OAI: oai:DiVA.org:kth-17555DiVA: diva2:335599
QC 201005252010-08-052010-08-052016-07-19Bibliographically approved