Wafer bonding with nano-imprint resists as sacrificial adhesive for fabrication of silicon-on-integrated-circuit (SOIC) wafers in 3D integration of MEMS and ICs
2009 (English)In: Sensors and Actuators A-Physical, ISSN 0924-4247, Vol. 154, no 1, 180-186 p.Article in journal (Refereed) Published
In this paper, we present the use of thermosetting nano-imprint resists in adhesive wafer bonding. The presented wafer bonding process is suitable for heterogeneous three-dimensional (3D) integration of microelectromechanical systems (MEMS) and integrated circuits (ICs). Detailed adhesive bonding process parameters are presented to achieve void-free, well-defined and uniform wafer bonding interfaces. Experiments have been performed to optimize the thickness control and uniformity of the nano-imprint resist layer in between the bonded wafers. In contrast to established polymer adhesives such as, e.g., BCB, nano-imprint resists as adhesives for wafer-to-wafer bonding are specifically suitable if the adhesive is intended as sacrificial material. This is often the case, e.g., in fabrication of silicon-on-integrated-circuit (SOIC) wafers for 3D integration of MEMS membrane structures on top of IC wafers. Such IC integrated MEMS includes. e.g., micro-mirror arrays, infrared bolometer arrays, resonators, capacitive inertial sensors, pressure sensors and microphones.
Place, publisher, year, edition, pages
2009. Vol. 154, no 1, 180-186 p.
Adhesive wafer bonding, Nano-imprint resist, Polymer, 3D IC MEMS, integration, Silicon-on-integrated-circuit, SOIC, nanoimprint lithography, polymer deformation, arrays, thermosets, design, flow
Other Electrical Engineering, Electronic Engineering, Information Engineering
IdentifiersURN: urn:nbn:se:kth:diva-18753DOI: 10.1016/j.sna.2009.07.009ISI: 000269771200028ScopusID: 2-s2.0-68849118449OAI: oai:DiVA.org:kth-18753DiVA: diva2:336800
QC 201005252010-08-052010-08-052013-10-03Bibliographically approved