Modelling noise and delay in VLSI circuits
2003 (English)In: Electronics Letters, ISSN 0013-5194, E-ISSN 1350-911X, Vol. 39, no 3, 269-271 p.Article in journal (Refereed) Published
New models for estimating delay and noise in VLSI circuits, based on closed form expressions for the first and second moment of the impulse response in coupled RC trees are reported. The effect of crosstalk on delay and noise can be accurately estimated with a complexity only marginally higher than the Elmore delay.
Place, publisher, year, edition, pages
2003. Vol. 39, no 3, 269-271 p.
IdentifiersURN: urn:nbn:se:kth:diva-22320DOI: 10.1049/el:20030208ISI: 000181532500007OAI: oai:DiVA.org:kth-22320DiVA: diva2:341018
QC 201005252010-08-102010-08-10Bibliographically approved