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Efficient library characterization for high-level power estimation
KTH, Superseded Departments, Electronic Systems Design.
2004 (English)In: IEEE Transactions on Very Large Scale Integration (vlsi) Systems, ISSN 1063-8210, E-ISSN 1557-9999, Vol. 12, no 6, 657-661 p.Article in journal (Refereed) Published
Abstract [en]

This paper describes LP-DSM, which is an algorithm used for efficient library characterization in high-level power estimation. LP-DSM characterizes the power consumption of building blocks using the entropy of primary inputs and primary outputs. The experimental results showed that over a wide range of benchmark circuits implemented using full custom design in 0.35-mum 3.3 V CMOS process the statistical performance (mean and maximum error) of LP-DSM is comparable or sometimes better than most of the published algorithms. Moreover, it was found that LP-DSM has the lowest prediction sum of squares, which makes it an efficient tool for power prediction. Furthermore, the complexity of the LP-DSM is linear in relation to the number of primary inputs (O(NI)), whereas state of the art published library characterization algorithms have a complexity of O(NI2).

Place, publisher, year, edition, pages
2004. Vol. 12, no 6, 657-661 p.
Keyword [en]
digital signal processor (DSP) algorithms, least-square estimation, low-power architecture synthesis, low-power library characterization
National Category
Computer Engineering
Identifiers
URN: urn:nbn:se:kth:diva-23473DOI: 10.1109/TVLSI.2004.827601ISI: 000221804200010Scopus ID: 2-s2.0-3042516959OAI: oai:DiVA.org:kth-23473DiVA: diva2:342171
Note
QC 20100525 QC 20111027Available from: 2010-08-10 Created: 2010-08-10 Last updated: 2017-12-12Bibliographically approved

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