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A criterion for optimizing bit-reduced post-correction of AD converters
KTH, Superseded Departments, Signals, Sensors and Systems.
KTH, Superseded Departments, Signals, Sensors and Systems.ORCID iD: 0000-0002-7926-5081
KTH, Superseded Departments, Signals, Sensors and Systems.ORCID iD: 0000-0002-2718-0262
2004 (English)In: IEEE Transactions on Instrumentation and Measurement, ISSN 0018-9456, E-ISSN 1557-9662, Vol. 53, no 4, 1159-1166 p.Article in journal (Refereed) Published
Abstract [en]

Dynamic digital post-correction of analog-to-digital converters (ADCs) is considered. A generalized dynamic correction method is proposed and a framework for analyzing the related bit allocation problem is derived. Finally, this framework is employed in an optimization problem. The solution to the problem indicates which ADC output bits to use in order to maximize the signal-to-noise and distortion ratio in a post-correction system with a constraint on memory size. The proposed methods are accompanied by exemplary results obtained using experimental ADC data.

Place, publisher, year, edition, pages
2004. Vol. 53, no 4, 1159-1166 p.
Keyword [en]
analog-to-digital converter (ADC), bit allocation, dynamic, Hadamard transform, look-up table correction, optimization, compensation
National Category
Signal Processing Telecommunications
Identifiers
URN: urn:nbn:se:kth:diva-23598DOI: 10.1109/TIM.2004.831441ISI: 000222839700040Scopus ID: 2-s2.0-4043067072OAI: oai:DiVA.org:kth-23598DiVA: diva2:342297
Note
QC 20100525 QC 20110926Available from: 2010-08-10 Created: 2010-08-10 Last updated: 2017-12-12Bibliographically approved

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Skoglund, MikaelHändel, Peter

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