Bound set selection and circuit re-synthesis for area/delay driven decomposition
2005 (English)In: DESIGN, AUTOMATION AND TEST IN EUROPE CONFERENCE AND EXHIBITION, VOLS 1 AND 2, PROCEEDINGS, 2005, 430-431 p.Conference paper (Refereed)
This paper addresses two problems related to disjoint-support decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results in the disjoint-support decomposition f(X, Y) = h(g(X), Y) with a good area/delay trade-off. Second, we present a technique for re-synthesis of the original circuit implementing f (X, Y) into a circuit implementing the decomposed representation h(g(x), Y)Preliminary experimental results indicate that the proposed approach has a significant potential.
Place, publisher, year, edition, pages
2005. 430-431 p.
, Design, Automation and Test in Europe Conference and Expo, ISSN 1530-1591
Boolean functions, Delay circuits, Electric network analysis, Electric variables control, Heuristic methods, Problem solving, Set theory
IdentifiersURN: urn:nbn:se:kth:diva-24442DOI: 10.1109/DATE.2005.83ISI: 000228086900079ScopusID: 2-s2.0-33646918903ISBN: 0-7695-2288-2OAI: oai:DiVA.org:kth-24442DiVA: diva2:349904
Design, Automation and Test in Europe Conference and Exhibition (DATE 05) Munich, GERMANY, MAR 07-11, 2005
QC 201009092010-09-092010-09-092012-11-01Bibliographically approved